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DS3/E3 FRAMER IC
XRT7250
REV. 1.1.1
55
2.3.2
Framer Register Description
This section provides a function description of each
bit-field within each of the on-chip Framer Registers.
NOTE: For all on-chip registers, a table containing the bit-
format of the register is presented. Additionally, these
tables also contain the default values for each of these reg-
ister bits. Finally, the functional description, associated with
each register bit-field is presented, along with a reference to
a Section Number, within this Data Sheet, that provides a
more in-depth discussion of the functions associated with
this register bit-field.
2.3.2.1
Framer Operating Mode Register
Bit 7 - Local Loopback Mode
0x58
PMON CP Bit Error Event Count Register - MSB
b00000000
RUR
0x59
PMON CP Bit Error Event Count Register - LSB
b00000000
RUR
0x5A - 0x6B Reserved
b00000000
RUR
0x6C
PMON Holding Register
b00000000
RUR
0x6D
One-Second Error Status Register
b00000000
R/O
0x6E
LCV One-Second Accumulator Register - MSB
b00000000
R/O
0x6F
LCV One-Second Accumulator Register - LSB
b00000000
R/O
0x70
Frame Parity Error One-Second Accumulator Register -
MSB (BIP-8 in G.832)
b00000000
R/O
0x71
Frame Parity Error One-Second Accumulator Register -
LSB (BIP-8 in G.832)
b00000000
R/O
0x72
Frame CP Bit Error - One-Second Accumulator Register -
MSB
b00000000
R/O
0x73
Frame CP Bit Error - One-Second Accumulator Register -
LSB
b00000000
R/O
0x72 - 0x7F Reserved
0x80
Line Interface Drive Register
b00001000
R/W
0x81
Line Interface Scan Register
b00000000
R/O
0x82 - 0x85 Reserved
0x86 - 0xDD Transmit LAPD Message Buffer (RAM)
bxxxxxxx
R/W
0xDE -
0x135
Receive LAPD Message Buffer (RAM)
bxxxxxxx
R/W
TABLE 4: REGISTER ADDRESSING OF THE FRAMER PROGRAMMER REGISTERS
ADDRESS
REGISTER NAME
POWER UP DEFAULT VALUE
REGISTER TYPE
FRAMER OPERATING MODE REGISTER (ADDRESS = 0X00)
BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0
Local Loopback
DS3/E3*
Internal
LOS
Enable
RESET
Interrupt
Enable Reset
Frame Format
TimRefSel[1:0]
R/W
00
1
0
1
0
1