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參數(shù)資料
| 型號： | XRT71D04 |
| 廠商： | Exar Corporation |
| 英文描述： | 4-Channel E3/DS3/STS-1 Jitter Attenuator,STS-1 to DS3 Desynchronizer(達(dá)到E3/DS3/STS-1振蕩要求的4通道振蕩衰減器) |
| 中文描述： | 4通道E3/DS3/STS-1抖動衰減器，STS - 1的到DS3 Desynchronizer（達(dá)到E3/DS3/STS-1振蕩要求的4通道振蕩衰減器） |
| 文件頁數(shù)： | 6/21頁 |
| 文件大小： | 223K |
| 代理商： | XRT71D04 |
XRT71D04
4 CHANNEL E3/DS3/STS-1 JITTER ATTENUATOR, STS-1 TO DS3 DESYNCHRONIZER
REV. P1.0.2
á
PRELIMINARY
5
23
STS1_ch0
I
SONET STS1 Mode Select - channel 0:
This pin along with the DS3/E3_ch0 select pin configures the XRT71D04 either
in E3, DS3 or STS-1 mode.
A table relating to the setting of the pins is given below:
STS-1
DS3/E3
XRT71D04 Operating Mode
0 0 DS3 (44.736 MHz)
0 1 E3 (34.368 MHz)
1 0 STS-1 (51.84 MHz)
1 1 E3 (34.368 MHz)
This input pin is active only in the Hardware Mode.
24
DS3/E3_ch0
I
DS3/E3 Select Input - channel 0
:
See description pin 9.
Internal 50 K Ohm pull-down resistor.
25
DJA0/SCLK
I
Harware Mode
Disable Jitter Attenuator Input - Channel 0:
An active-high disables the Jitter Attenuator. The RPOS/RNEG and RCLK will
be passed through without jitter attenuation.
Host Mode
Microprocessor Serial Interface Clock Signal:
This signal will be used to (1) sample the data, on the SDI pin, on the rising
edge of this signal. Additionally, during “Read” operations, the Microprocessor
Serial Interface will update the SDO output on the falling edge of this signal.
Internal 50 K Ohm pull-down resistor.
26
MCLK3
I
Master Clock Input - channel 3:
Reference clock for internal PLL. 44.736MHz+/-20ppm or 34.368MHz+/-
20ppm. This clock must be continuous and jitter free with duty cycle between
30 to 70%.
It is permissible to use the EXCLK signal orSTS1 clock.
Internal 50 K Ohm pull-up resistor.
27
VSS
****
Digital Ground
28
RCLK3
I
Received Clock (Jittery) - channel 3:
Clock input RCLK3 should be connected to the recovered clock.
Internal 50 K Ohm pull-up resistor.
29
RPOS2
I
Received Positive Data (Jittery) Input: - channel 2:
Data that is input on this pin is sampled on either the rising or falling edge of
RCLK depending on the setting of the RCLKES pin (pin 10).
If RCLKES is “high”, then RPOS will be sampled on the falling edge of RCLK.
If RCLKES is “l(fā)ow”, then RPOS will be sampled on the rising edge of RCLK.
Internal 50 K Ohm pull-up resistor.
30
RNEG2
I
Received Negative Data (Jittery) - channel 2:
The input jittery negative data is sampled either on the rising or falling edge of
RCLK depending on the setting of RCLKES.
If RCLKES is “high”, then RNEG will be sampled on the falling edge of RCLK.
If RCLKES is “l(fā)ow”, then RPOS will be sampled on the rising edge of RCLK.
This pin is typically tied to the “RNEG” output pin of the LIU.
Internal 50 K Ohm pull-up resistor.
31
VDD
****
Digital Power Supply = 5V±5% or 3.3V±5%
PIN DESCRIPTION
P
IN
#
N
AME
T
YPE
D
ESCRIPTION
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT71D04ES | 功能描述:時鐘合成器/抖動清除器 4CH T3/E3 JA w/T73LC04A RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| XRT71D04IV | 功能描述:時鐘合成器/抖動清除器 4CH E3/DS3/STS1 JIT ATTEN DE-SYNCH RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| XRT71D04IVTR | 功能描述:時鐘合成器/抖動清除器 4CH E3/DS3/STS1 JIT ATTEN DE-SYNCH RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| XRT7250 | 制造商:EXAR 制造商全稱:EXAR 功能描述:DS3/E3 FRAMER IC |
| XRT7250ES-PCI | 功能描述:界面開發(fā)工具 Evaluation Board for XRT7250 Series RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
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