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參數(shù)資料
| 型號(hào)： | XRT71D04 |
| 廠商： | Exar Corporation |
| 英文描述： | 4-Channel E3/DS3/STS-1 Jitter Attenuator,STS-1 to DS3 Desynchronizer(達(dá)到E3/DS3/STS-1振蕩要求的4通道振蕩衰減器) |
| 中文描述： | 4通道E3/DS3/STS-1抖動(dòng)衰減器，STS - 1的到DS3 Desynchronizer（達(dá)到E3/DS3/STS-1振蕩要求的4通道振蕩衰減器） |
| 文件頁數(shù)： | 14/21頁 |
| 文件大小： | 223K |
| 代理商： | XRT71D04 |
XRT71D04
4 CHANNEL E3/DS3/STS-1 JITTER ATTENUATOR, STS-1 TO DS3 DESYNCHRONIZER
REV. P1.0.2
á
PRELIMINARY
13
An asynchronous mapping for DS3 into STS-1 SPE is
defined for clear-channel transport of DS3 signals
that meet the DSX-3 requirements in the GR-499-
CORE.
When the input data has a rate lower than the output
data rate, the positive stuffing will occur. The stuffing
mechanism that generates the C-bits is implement-
ed in a desynchronizer that has the jitter output less
than 0.4 UIpp assuming no jitter or wander at the in-
put of the synchronizer and no pointer adjustments. A
block diagram of the Desynchronizer is shown in
Figure 6.
The elastic store accepts the STS-1 data stream and
a gapped clock. The gaps in the input clock inhibit the
elastic store from writing all but DS3 payload data.
The bit leaking circuit stores incoming STS-1 pointer
adjustments into a queue and leaks them out of the
desynchronizer one bit at a time.
STS-Nc signal is used to transport higher rate sig-
nals. However,the digital signals that SONET carries
do not fit in the SPE perfectly.
Hardware Mode
The HOST pin is used to select the operating mode of
the XRT71D04. In Hardware mode (connect this pin
to ground), the serial processor interface is disabled
and hard-wired pins are used to control configuration
and report status.
H
OST
M
ODE
:
In Host mode (connect this pin to VDD), the serial
port interface pins are used to control configuration
and status report. In this mode, serial interface pins :
SDI, SDO,SCLK and CS are used.
A listing of these Command Registers, their Address-
es, and their bit-formats are listed below in Table 2.
F
IGURE
6. XRT71D04 D
ESYNCHRONIZER
B
LOCK
D
IAGRAM
STS-N
STS-N
STS-N
Clock
Clock
Recovery
Descramble/
Demux
STS-1
Nth STS-1
OH
Processing
STS-1
Section &
Line Overhead
Pointer
Processing
Elastic
Store
STS-1
Dejittering &
Pointer
Adjustment
STS-1
gapped clock
STS-1
gapped clock
STS-1
reference clock
DS3 payload
(dejittered)
Stuff Control
XRT71D04
T
ABLE
1: F
UNCTIONS
OF
DUAL
MODE
PINS
IN
H
ARDWARE
M
ODE
CONFIGURATION
P
IN
#
P
IN
N
AME
F
UNCTION
,
WHILE
IN
THE
H
ARDWARE
M
ODE
25
DJA0/SCLK
DJA0
37
DJA2/(CS)
DJA2
77
DJA1/(SDI)
DJA1
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| XRT71D04ES | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 4CH T3/E3 JA w/T73LC04A RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
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