參數(shù)資料
型號(hào)： XRT4500
廠商： Exar Corporation
英文描述： MULTIPROTOCOL SERIAL NETWORK INTERFACE IC
中文描述： 多協(xié)議串行網(wǎng)絡(luò)接口芯片
文件頁數(shù)： 16/99頁
文件大?。?/td> 1384K
代理商： XRT4500
á
XRT4500
MULTIPROTOCOL SERIAL NETWORK INTERFACE IC
REV. 1.0.7
13
PIN DESCRIPTIONS (CONT.)
N
OTE
:
Signal names beginning with D_ are digital signals.
N
OTE
:
Signal names ending with B and A are the positive
and negative polarities of differential signals respectively.
PIN
#
Signal
DTE
MODE
DCE
MODE
TYPE
FUNCTION
33
RX5D
D_DSR
D_DTR
O
Receiver 5 – Digital Data Output to Terminal Equipment
The XRT4500 accepts a line signal (in either the V.10, V.11 or
V.28 manner) via the RX5A and RX5B input pins (Pins 35 & 36).
The XRT4500 then converts this data into digital format (e.g., a
CMOS level binary data stream) and outputs it to the Terminal
Equipment via this pin.
The exact role that this pin plays depends upon whether the
XRT4500 device is operating in the DCE or DTE modes.
DTE Mode – Data Set Ready (DSR) Output Pin
For DTE applications, this output pin should be connected to the
“DSR” input of the Terminal Equipment.
DCE Mode – Data Terminal Ready (DTR) Output Pin
For DCE applications, this output pin should be connected to the
“DTR” input pin of the Terminal Equipment.
Note:
1. This output pin is tri-stated if the EN_OUT input pin (pin 48)
is “HIGH”.
2. If the XRT4500 has been configured to operate in the
“Registered” Mode, then data will be outputted via this pin
upon the rising edge of the “REG_CLK” clock signal.
34
EC
I
Echo Clock Mode Select Input Pin
This input pin permits the user to enable or disable the “Echo-
Clock” Mode feature within the XRT4500 device. If the user con-
figures the XRT4500 to operate in the “Echo-Clock” Mode, then
the RX3D output pin (Pin 73) will be internally looped into the
“TX2D” input pin (Pin 67).
Setting this input pin “LOW” enables the “Echo-Clock” Mode.
Setting this input pin “HIGH” disables the “Echo-Clock” Mode.
Note:
The “Echo-Clock” Mode feature is only available if the
XRT4500 is operating in the DTE Mode.
This input pin contains an internal 20K
pull-up to VDD.
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