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參數(shù)資料
| 型號： | XR17V252IM-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 30/69頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC UART PCI BUS DUAL 100TQFP |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 特點： | * |
| 通道數(shù)： | 2，DUART |
| FIFO's： | 64 字節(jié) |
| 規(guī)程： | RS485 |
| 電源電壓： | 3.3V，5V |
| 帶自動流量控制功能： | 是 |
| 帶IrDA 編碼器/解碼器： | 是 |
| 帶故障啟動位檢測功能： | 是 |
| 帶調(diào)制解調(diào)器控制功能： | 是 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-TQFP |
| 供應(yīng)商設(shè)備封裝： | 100-TQFP（14x14） |
| 包裝： | 托盤 |
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XR17V252
36
66 MHZ PCI BUS DUAL UART WITH POWER MANAGEMENT SUPPORT
REV. 1.0.2
NOTE:
MCR bits [3:2] (OP1 and OP2 outputs) are not available in the XR17V252. They are present for 16C550
compatibility during Internal loopback, see
4.6
Transmitter
The transmitter section comprises of a 64 bytes of FIFO, a byte-wide Transmit Holding Register (THR) and an
8-bit Transmit Shift Register (TSR). THR receives a data byte from the host (non-FIFO mode) or a data byte
from the FIFO when the FIFO is enabled by FCR bit [0]. TSR shifts out every data bit with the 16X or 8X
internal clock. A bit time is 16 or 8 clock periods. The transmitter sends the start bit followed by the number of
data bits, inserts the proper parity bit if enable, and adds the stop bit(s). The status of the THR and TSR are
reported in the Line Status Register (LSR bit [6:5]).
4.6.1
Transmit Holding Register (THR)
The transmit holding register is an 8-bit register providing a data interface to the host processor. The host
writes transmit data byte to the THR to be converted into a serial data stream including start-bit, data bits,
parity-bit and stop-bit(s). The least-significant-bit (bit [0]) becomes first data bit to go out. The THR is also the
input register to the transmit FIFO of 64 bytes when FIFO operation is enabled by FCR bit[0]. A THR empty
interrupt can be generated when it is enabled in IER bit [1].
4.6.2
Transmitter Operation in non-FIFO Mode
The host loads transmit data to THR one character at a time. The THR empty flag (LSR bit [5]) is set when the
data byte is transferred to TSR. THR flag can generate a transmit empty interrupt (ISR bit [1]) when it is
enabled by IER bit [1]. The TSR flag (LSR bit [6]) is set when TSR becomes completely empty.
1 0 0 1
EFR
R/W
Auto
CTS/
DSR
Enable
Auto
RTS/
DTR
Enable
Special
Char
Select
Enable
IER [7:5],
ISR [5:4],
FCR[5:4],
MCR[7:5,2]
MSR[7:4]
Soft-
ware
Flow
Cntl
Bit [3]
Soft-
ware
Flow
Cntl
Bit [2]
Soft-
ware
Flow
Cntl
Bit [1]
Soft-
ware
Flow
Cntl
Bit [0]
1 0 1 0
TXCNT
R
Bit [7]
Bit [6]
Bit [5]
Bit [4]
Bit [3]
Bit [2]
Bit [1]
Bit [0]
1 0 1 0
TXTRG
W
Bit [7]
Bit [6]
Bit [5]
Bit [4]
Bit [3]
Bit [2]
Bit [1]
Bit [0]
1 0 1 1
RXCNT
R
Bit [7]
Bit [6]
Bit [5]
Bit [4]
Bit [3]
Bit [2]
Bit [1]
Bit [0]
1 0 1 1
RXTRG
W
Bit [7]
Bit [6]
Bit [5]
Bit [4]
Bit [3]
Bit [2]
Bit [1]
Bit [0]
1 1 0 0
XCHAR
R
0
TX Xon
Indicator
TX Xoff
Indicator
Xon Det.
Indicator
Xoff Det.
Indicator
Self clear
after read
1 1 0 0
XOFF1
W
Bit [7]
Bit [6]
Bit [5]
Bit [4]
Bit [3]
Bit-2
Bit [1]
Bit [0]
1 1 0 1
XOFF2
W
Bit [7]
Bit [6]
Bit [5]
Bit [4]
Bit [3]
Bit-2
Bit [1]
Bit [0]
1 1 1 0
XON1
W
Bit [7]
Bit [6]
Bit [5]
Bit [4]
Bit [3]
Bit-2
Bit [1]
Bit [0]
1 1 1 1
XON2
W
Bit [7]
Bit [6]
Bit [5]
Bit [4]
Bit [3]
Bit-2
Bit [1]
Bit [0]
TABLE 14: UART CHANNEL CONFIGURATION REGISTERS DESCRIPTION. SHADED BITS ARE ENABLED BY EFR BIT-4.
ADDRESS
A3-A0
REG
NAME
READ/
WRITE
BIT [7]
BIT [6]
BIT [5]
BIT [4]
BIT [3]
BIT [2]
BIT[1]
BIT [0]
COMMENT
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XR17V252IMTR-F | 制造商:Exar Corporation 功能描述:UART 2-CH 64Byte FIFO 3.3V 100-Pin TQFP T/R 制造商:Exar Corporation 功能描述:XR17V252IMTR-F |
| XR17V254 | 制造商:EXAR 制造商全稱:EXAR 功能描述:66MHZ PCI BUS QUAD UART WITH POWER MANAGEMENT SUPPORT |
| XR17V254_08 | 制造商:EXAR 制造商全稱:EXAR 功能描述:66MHZ PCI BUS QUAD UART WITH POWER MANAGEMENT SUPPORT |
| XR17V254IV | 制造商:EXAR 制造商全稱:EXAR 功能描述:66MHZ PCI BUS QUAD UART WITH POWER MANAGEMENT SUPPORT |
| XR17V254IV-0A-EVB | 功能描述:UART 接口集成電路 Supports V254 144 ld LQFP,PCI Interface RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
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