
XR17V252
34
66 MHZ PCI BUS DUAL UART WITH POWER MANAGEMENT SUPPORT
REV. 1.0.2
TABLE 13: UART CHANNEL CONFIGURATION REGISTERS.
ADDRESS
REGISTER
READ/WRITE
COMMENTS
A3 A2 A1 A0
16550 COMPATIBLE
0
0 0
RHR - Receive Holding Reg
THR - Transmit Holding Register
Read-only
Write-only
LCR[7] = 0
0
0 0
DLL - Divisor LSB
Read/Write
LCR[7] = 1
0
0 1
DLM - Divisor MSB
Read/Write
LCR[7] = 1
0
1 0
DLD - Divisor Fractional Part
Read/Write
LCR[7] = 1
0
0 1
IER - Interrupt Enable Reg
Read/Write
LCR[7] = 0
0
1 0
ISR - Interrupt Status Reg
FCR - FIFO Control Reg
Read-only
Write-only
LCR[7] = 0
0
1 1
LCR - Line Control Reg
Read/Write
0
1
0 0
MCR - Modem Control Reg
Read/Write
0
1
0 1
LSR - Line Status Reg
reserved
Read-only
Write-only
0
1
1 0
MSR - Modem Status Reg
- Auto RS485 Delay
Read-only
Write-only
0
1
1 1
SPR - Scratch Pad Reg
Read/Write
ENHANCED REGISTER
1
0
0 0
FCTR
Read/Write
1
0
0 1
EFR - Enhanced Function Reg
Read/Write
1
0
1 0
TXCNT - Transmit FIFO Level Counter
TXTRG - Transmit FIFO Trigger Level
Read-only
Write-only
1
0
1 1
RXCNT - Receive FIFO Level Counter
RXTRG - Receive FIFO Trigger Level
Read-only
Write-only
1
0 0
Xoff-1 - Xoff Character 1
Xchar
Write-only
Read-only
Xon,Xoff Rcvd.
Flags
1
0 1
Xoff-2 - Xoff Character 2
reserved
Write-only
Read-only
1
1 0
Xon-1 - Xon Character 1
reserved
Write-only
Read-only
1
1 1
Xon-2 - Xon Character 2
reserved
Write-only
Read-only