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參數(shù)資料
| 型號： | XCV200-6PQG240I |
| 廠商： | XILINX INC |
| 元件分類： | FPGA |
| 英文描述： | FPGA, 1176 CLBS, 236666 GATES, 333 MHz, PQFP240 |
| 封裝： | PLASTIC, QFP-240 |
| 文件頁數(shù)： | 13/24頁 |
| 文件大?。?/td> | 167K |
| 代理商： | XCV200-6PQG240I |
Virtex 2.5 V Field Programmable Gate Arrays
R
Module 3 of 4
DS003-3 (v3.2) September 10, 2002
20
1-800-255-7778
Production Product Specification
Global Clock Set-Up and Hold for LVTTL Standard, without DLL
Description
Symbol
Device
Speed Grade
Units
Min
-6
-5
-4
Input Setup and Hold Time Relative to Global Clock Input Signal for LVTTL Standard.(2) For data input with different
standards, adjust the setup time delay by the values shown in Input Delay Adjustments.
Full Delay
Global Clock and IFF, without
DLL
TPSFD/TPHFD
XCV50
0.6 / 0
2.3 / 0
2.6 / 0
2.9 / 0
ns,
min
XCV100
0.6 / 0
2.3 / 0
2.6 / 0
3.0 / 0
ns,
min
XCV150
0.6 / 0
2.4 / 0
2.7 / 0
3.1 / 0
ns,
min
XCV200
0.7 / 0
2.5 / 0
2.8 / 0
3.2 / 0
ns,
min
XCV300
0.7 / 0
2.5 / 0
2.8 / 0
3.2 / 0
ns,
min
XCV400
0.7 / 0
2.6 / 0
2.9 / 0
3.3 / 0
ns,
min
XCV600
0.7 / 0
2.6 / 0
2.9 / 0
3.3 / 0
ns,
min
XCV800
0.7 / 0
2.7 / 0
3.1 / 0
3.5 / 0
ns,
min
XCV1000
0.7 / 0
2.8 / 0
3.1 / 0
3.6 / 0
ns,
min
IFF = Input Flip-Flop or Latch
Notes: Notes:
1.
Set-up time is measured relative to the Global Clock input signal with the fastest route and the lightest load. Hold time is measured
relative to the Global Clock input signal with the slowest route and heaviest load.
2.
A Zero "0" Hold Time listing indicates no hold time or a negative hold time. Negative values can not be guaranteed "best-case", but
if a "0" is listed, there is no positive hold time.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XCV200E | 制造商:XILINX 制造商全稱:XILINX 功能描述:Field Programmable Gate Arrays |
| XCV200E-6BG240C | 制造商:XILINX 制造商全稱:XILINX 功能描述:Virtex⑩-E 1.8 V Field Programmable Gate Arrays |
| XCV200E-6BG240I | 制造商:XILINX 制造商全稱:XILINX 功能描述:Virtex⑩-E 1.8 V Field Programmable Gate Arrays |
| XCV200E-6BG352C | 功能描述:IC FPGA 1.8V C-TEMP 352-MBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:Virtex®-E 產(chǎn)品變化通告:Step Intro and Pkg Change 11/March/2008 標(biāo)準(zhǔn)包裝:1 系列:Virtex®-5 SXT LAB/CLB數(shù):4080 邏輯元件/單元數(shù):52224 RAM 位總計:4866048 輸入/輸出數(shù):480 門數(shù):- 電源電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:1136-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5 |
| XCV200E-6BG352C0773 | 制造商:Xilinx 功能描述: |
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