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Spartan and Spartan-XL FPGA Families Data Sheet
30
DS060 (v2.0) March 1, 2013
Product Specification
R
Product Obsolete/Under Obsolescence
to the DONE pin. User I/Os for each device become active
after the DONE pin for that device goes High. (The exact
timing is determined by development system options.)
Since the DONE pin is open-drain and does not drive a High
value, tying the DONE pins of all devices together prevents
all devices in the chain from going High until the last device
in the chain has completed its configuration cycle. If the
DONE pin of a device is left unconnected, the device
becomes active as soon as that device has been config-
ured. Only devices supporting Express mode can be used
to form an Express mode daisy chain.
Figure 27: Express Mode Circuit Diagram
INIT
CCLK
Spartan-XL
M0
M1
CS1
D0-D7
DATA BUS
PROGRAM
INIT
CCLK
PROGRAM
INIT
DOUT
DONE
DOUT
To Additional
Optional
Daisy-Chained
Devices
To Additional
Optional
Daisy-Chained
Devices
Optional
Daisy-Chained
Spartan-XL
M0
M1
VCC
3.3K
CS1
D0-D7
PROGRAM
DS060_27_080400
8
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| XCS30-4VQ100I | 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS30-4VQ144C | 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS30-4VQ144I | 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS30-4VQ208C | 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS30-4VQ208I | 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
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