參數(shù)資料
型號(hào)： XCS05XL-4VQ144C
廠商： Xilinx, Inc.
英文描述： Spartan and Spartan-XL Families Field Programmable Gate Arrays
中文描述： 斯巴達(dá)和Spartan - xL的家庭現(xiàn)場(chǎng)可編程門陣列
文件頁(yè)數(shù)： 44/82頁(yè)
文件大?。?/td> 623K
代理商： XCS05XL-4VQ144C
Spartan and Spartan-XL Families Field Programmable Gate Arrays
44
www.xilinx.com
1-800-255-7778
DS060 (v1.6) September 19, 2001
Product Specification
R
Spartan CLB Switching Characteristic Guidelines
Testing of switching parameters is modeled after testing
methods specified by MIL-M-38510/605. All devices are
100% functionally tested. Internal timing parameters are
derived from measuring internal test patterns. Listed below
are representative values. For more specific, more precise,
and worst-case guaranteed data, use the values reported
by the static timing analyzer (TRCE in the Xilinx Develop-
ment System)
and back-annotated to the simulation netlist.
All timing parameters assume worst-case operating condi-
tions (supply voltage and junction temperature). Values
apply to all Spartan devices and expressed in nanoseconds
unless otherwise noted.
Symbol
Clocks
T
CH
T
CL
Combinatorial Delays
T
ILO
F/G inputs to X/Y outputs
T
IHO
F/G inputs via H to X/Y outputs
T
HH1O
C inputs via H1 via H to X/Y outputs
CLB Fast Carry Logic
T
OPCY
Operand inputs (F1, F2, G1, G4) to C
OUT
T
ASCY
Add/Subtract input (F3) to C
OUT
T
INCY
Initialization inputs (F1, F3) to C
OUT
T
SUM
C
IN
through function generators to X/Y outputs
T
BYP
C
IN
to C
OUT
, bypass function generators
Sequential Delays
T
CKO
Clock K to Flip-Flop outputs Q
Setup Time before Clock K
T
ICK
F/G inputs
T
IHCK
F/G inputs via H
T
HH1CK
C inputs via H1 through H
T
DICK
C inputs via DIN
T
ECCK
C inputs via EC
T
RCK
C inputs via S/R, going Low (inactive)
Hold Time after Clock K
All Hold times, all devices
Set/Reset Direct
T
RPW
Width (High)
T
RIO
Delay from C inputs via S/R, going High to Q
Global Set/Reset
T
MRW
Minimum GSR pulse width
T
MRQ
Delay from GSR input to any Q
F
TOG
Toggle Frequency (MHz)
(for export control purposes)
Description
Speed Grade
Units
-4
-3
Min
Max
Min
Max
Clock High time
Clock Low time
3.0
3.0
-
-
4.0
4.0
-
-
ns
ns
-
-
-
1.2
2.0
1.7
-
-
-
1.6
2.7
2.2
ns
ns
ns
-
-
-
-
-
1.7
2.8
1.2
2.0
0.5
-
-
-
-
-
2.1
3.7
1.4
2.6
0.6
ns
ns
ns
ns
ns
-
2.1
-
2.8
ns
1.8
2.9
2.3
1.3
2.0
2.5
-
-
-
-
-
-
2.4
3.9
3.3
2.0
2.6
4.0
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
0.0
-
0.0
-
ns
3.0
-
-
4.0
-
-
ns
ns
3.0
4.0
11.5
See
page 50
for T
RRI
values per device.
-
166
-
13.5
-
ns
-
125
MHz
相關(guān)PDF資料
PDF描述
XCS05XL-4VQ144I Spartan and Spartan-XL Families Field Programmable Gate Arrays
XCS05XL-4VQ208C Spartan and Spartan-XL Families Field Programmable Gate Arrays
XCS05XL-4VQ208I Spartan and Spartan-XL Families Field Programmable Gate Arrays
XCS05XL-4VQ240C Spartan and Spartan-XL Families Field Programmable Gate Arrays
XCS05XL-4VQ240I Spartan and Spartan-XL Families Field Programmable Gate Arrays
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XCS05XL-4VQ144I 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays
XCS05XL-4VQ208C 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays
XCS05XL-4VQ208I 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays
XCS05XL-4VQ240C 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays
XCS05XL-4VQ240I 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays
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