R
Identical configuration of multiple target FPGAs from a sin-
gle bitstream can be achieved through the appropriate con-
nections. See
Figure 9
for an example of two FPGAs that
are simultaneously configured from a single bitstream.
The System ACE software assigns bitstreams for the target
FPGAs in order, starting from the CFG_CS[0] pin through
CFG_CS[N-1] pin where N is the number of Slave-Select-
MAP devices in the system. N may be up to four devices.
Configuration Data
The configuration data sets for the target FPGAs are stored
in a standard, high-density Flash memory unit in the System
ACE MPM.
Data Storage
The System ACE MPM integrates a standard Flash memory
unit for storage of the configuration data sets. See
Table 12
.
The System ACE MPM product family offers data storage
capacity up to 64 Mb. See the Flash memory vendor
’
s data
sheets for additional information about the Flash memory
unit in the System ACE MPM. See
Table 13
for Flash mem-
ory data sheet references.
Figure 9:
Example Slave-SelectMAP Configuration for Identically Configured FPGAs
DS087_09_091001
CFG_VCCO
CFG_DATA[7:0]
CFG_MODE[2:0]
CFG_CCLK
CFG_INIT
CFG_DONE
CFG_PROG
CFG_WRITE
BUSY
CFG_CS[0]
FPGA
CS_B
D[7:0]
M[2:0]
CCLK
INIT_B
DONE
PROG_B
RDWR_B
BUSY
To
Identical
SelectMAP
FPGAs
FPGA
CS_B
D[7:0]
M[2:0]
CCLK
INIT_B
DONE
PROG_B
RDWR_B
BUSY
CFG_CS[0]
CFG_CS[0]
System ACE MPM
*1 Supply voltage to CFG_VCCO that is compatible with the FPGA configuration pins.
*2 Combined ACC/WP on XCCACEM32; Separate /WP and ACC on XCCACEM64.
FLASH_IO_LEVEL
/WP *
2
ACC *
2
FCM_ENABLE
SYSCLK
BITSTRSEL [0-2]
STATUS[0-3]
SYSRESET
CLK Source
BITSTRSEL[0-2]
3.3 V
4.7 k
4.7 k
330
4.7 k
4.7 k
CFG_VCCO *1
Table 12:
Flash Memory Storage
System ACE MPM
Flash Device
Flash
Density
Flash Speed
Grade
Flash Organization
XCCACEM16-BG388I
AMD Am29LV160DT
16 Mb
90 ns
1 M x 16-bit
(or 2 M x 8-bit)
XCCACEM32-BG388I
AMD Am29LV320DT
32 Mb
90 ns
2 M x 16-bit
(or 4 M x 8-bit)
XCCACEM64-BG388I
AMD Am29LV641DH
64 Mb
90 ns
4 M x 16-bit