Virtex-6 CXT Family Data Sheet
DS153 (v1.6) February 11, 2011
Product Specification
3
Virtex-6 CXT FPGA Documentation
In addition to the data sheet information found herein, complete and up-to-date documentation of the Virtex-6 family of
FPGAs is available on the Xilinx website and available for download:
Virtex-6 FPGA Configuration Guide (UG360) This all-encompassing configuration guide includes
chapters on configuration interfaces (serial and parallel),
multi-bitstream management, bitstream encryption,
boundary-scan and JTAG configuration, and reconfiguration
techniques.
Virtex-6 FPGA SelectIO Resources User Guide (UG361) This guide describes the SelectIO resources available in
all the Virtex-6 CXT devices.
Virtex-6 FPGA Clocking Resources User Guide (UG362) This guide describes the clocking resources available in all
the Virtex-6 CXT devices, including the MMCM and clock
buffers.
Virtex-6 FPGA Memory Resources User Guide (UG363) This guide describes the Virtex-6 CXT device block RAM
and FIFO capabilities.
Virtex-6 FPGA CLB User Guide (UG364) This guide describes the capabilities of the configurable
logic blocks (CLB) available in all Virtex-6 CXT devices.
Virtex-6 FPGA DSP48E1 Slice User Guide (UG369) This guide describes the architecture of the DSP48E1 slice
in Virtex-6 CXT FPGAs and provides configuration
examples.
Virtex-6 FPGA GTX Transceivers User Guide (UG366) This guide describes the GTX transceivers available in all
the Virtex-6 CXT FPGAs.
Virtex-6 FPGA Tri-Mode Ethernet MAC User Guide
This guide describes the dedicated tri-mode Ethernet
media access controller (TEMAC) available in all the
Virtex-6 CXT FPGAs.
Virtex-6 FPGA Data Sheet: DC and Switching
Reference this data sheet when considering device
migration to the Virtex-6 LXT and SXT families. It contains
the DC and Switching Characteristic specifications
specifically for the Virtex-6 LXT and SXT families.
Virtex-6 FPGA Packaging and Pinout Specifications
These specifications includes the tables for device/package
combinations and maximum I/Os, pin definitions, pinout
tables, pinout diagrams, mechanical drawings, and thermal
specifications of the Virtex-6 LXT and SXT families.
Reference these specifications when considering device
migration to the Virtex-6 LXT and SXT families.
Configuration Bitstream Overview for CXT Devices
This section contains two tables similar to those in the Virtex-6 FPGA Configuration Guide only updated for the CXT family.
The Virtex-6 CXT FPGA bitstream contains commands to the FPGA configuration logic as well as configuration data.
Table 3 gives a typical bitstream length and
Table 4 gives the specific device ID codes for the Virtex-6 CXT devices.
Table 3: Virtex-6 CXT FPGA Bitstream Length
Device
Total Number of Configuration Bits
XC6VCX75T
26,239,328
XC6VCX130T
43,719,776
XC6VCX195T
61,552,736
XC6VCX240T
73,859,552
Table 4: Virtex-6 CXT FPGA Device ID Codes
Device
ID Code (Hex)
XC6VCX75T
0x042C4093
XC6VCX130T
0x042CA093
XC6VCX195T
0x042CC093
XC6VCX240T
0x042D0093