參數(shù)資料
型號(hào)： XC3SD3400A-4CSG484LI
廠商： Xilinx Inc
文件頁數(shù)： 14/101頁
文件大?。?/td> 0K
描述： IC FPGA SPARTAN 3 DSP 484CSGBGA
標(biāo)準(zhǔn)包裝： 84
系列： Spartan®-3A DSP
LAB/CLB數(shù)： 5968
邏輯元件/單元數(shù)： 53712
RAM 位總計(jì)： 2322432
輸入/輸出數(shù)： 309
門數(shù)： 3400000
電源電壓： 1.14 V ~ 1.26 V
安裝類型： 表面貼裝
工作溫度： -40°C ~ 100°C
封裝/外殼： 484-FBGA，CSPBGA
供應(yīng)商設(shè)備封裝： 484-CSPBGA
其它名稱： 122-1723
XC3SD3400A-4CSG484LI-ND
DS610 (v3.0) October 4, 2010
Product Specification
2
Copyright 2007–2010 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and
other countries. PCI and PCI-X are trademarks of PCI-SIG and used under license. All other trademarks are the property of their respective owners.
Introduction
The Spartan-3A DSP family of Field-Programmable Gate Arrays
(FPGAs) solves the design challenges in most high- volume,
cost-sensitive, high-performance DSP applications. The
two-member family offers densities ranging from 1.8 to 3.4 million
system gates, as shown in Table 1.
The Spartan-3A DSP family builds on the success of the
Spartan-3A FPGA family by increasing the amount of memory per
logic and adding XtremeDSP DSP48A slices. New features
improve system performance and reduce the cost of configuration.
These Spartan-3A DSP FPGA enhancements, combined with
proven 90 nm process technology, deliver more functionality and
bandwidth per dollar than ever before, setting the new standard in
the programmable logic and DSP processing industry.
The Spartan-3A DSP FPGAs extend and enhance the Spartan-3A
FPGA family. The XC3SD1800A and the XC3SD3400A devices
are tailored for DSP applications and have additional block RAM
and XtremeDSP DSP48A slices. The XtremeDSP DSP48A slices
replace the 18x18 multipliers found in the Spartan-3A devices and
are based on the DSP48 blocks found in the Virtex-4 devices.
The block RAMs are also enhanced to run faster by adding an
output register. Both the block RAM and DSP48A slices in the
Spartan-3A DSP devices run at 250 MHz in the lowest cost,
standard -4 speed grade.
Because of their exceptional DSP price/performance ratio,
Spartan-3A DSP FPGAs are ideally suited to a wide range of
consumer electronics applications, such as broadband access,
home networking, display/projection, and digital television.
The Spartan-3A DSP family is a superior alternative to mask
programmed ASICs. FPGAs avoid the high initial cost, lengthy
development cycles, and the inherent inflexibility of conventional
ASICs. Also, FPGA programmability permits design upgrades in
the field with no hardware replacement necessary, an impossibility
with ASICs.
Features
Very low cost, high-performance DSP solution for
high-volume, cost-conscious applications
250 MHz XtremeDSP DSP48A Slices
Dedicated 18-bit by 18-bit multiplier
Available pipeline stages for enhanced performance of at
least 250 MHz in the standard -4 speed grade
48-bit accumulator for multiply-accumulate (MAC) operation
Integrated adder for complex multiply or multiply-add
operation
Integrated 18-bit pre-adder
Optional cascaded Multiply or MAC
Hierarchical SelectRAM memory architecture
Up to 2268 Kbits of fast block RAM with byte write enables
for processor applications
Up to 373 Kbits of efficient distributed RAM
Registered outputs on the block RAM with operation of at
least 280 MHz in the standard -4 speed grade
Dual-range VCCAUX supply simplifies 3.3V-only design
Suspend, Hibernate modes reduce system power
Low-power option reduces quiescent current
Multi-voltage, multi-standard SelectIO interface pins
Up to 519 I/O pins or 227 differential signal pairs
LVCMOS, LVTTL, HSTL, and SSTL single-ended I/O
3.3V, 2.5V, 1.8V, 1.5V, and 1.2V signaling
Selectable output drive, up to 24 mA per pin
QUIETIO standard reduces I/O switching noise
Full 3.3V ± 10% compatibility and hot swap compliance
622+ Mb/s data transfer rate per differential I/O
LVDS, RSDS, mini-LVDS, HSTL/SSTL differential I/O with
integrated differential termination resistors
Enhanced Double Data Rate (DDR) support
DDR/DDR2 SDRAM support up to 333 Mb/s
Fully compliant 32-/64-bit, 33/66 MHz PCI support
Abundant, flexible logic resources
Densities up to 53712 logic cells, including optional shift
register
Efficient wide multiplexers, wide logic, fast carry logic
IEEE 1149.1/1532 JTAG programming/debug port
Eight Digital Clock Managers (DCMs)
Clock skew elimination (delay locked loop)
Frequency synthesis, multiplication, division
High-resolution phase shifting
Wide frequency range (5 MHz to over 320 MHz)
Eight low-skew global clock networks, eight additional clocks
per half device, plus abundant low-skew routing
Configuration interface to industry-standard PROMs
Low-cost, space-saving SPI serial Flash PROM
x8 or x8/x16 BPI parallel NOR Flash PROM
Low-cost Xilinx Platform Flash with JTAG
Unique Device DNA identifier for design authentication
Load multiple bitstreams under FPGA control
Post-configuration CRC checking
embedded processor cores
BGA and CSP packaging with Pb-free options
Common footprints support easy density migration
XA Automotive version available
6
Spartan-3A DSP FPGA Family:
Introduction and Ordering Information
DS610 (v3.0) October 4, 2010
Product Specification
Table 1: Summary of Spartan-3A DSP FPGA Attributes
Device
System
Gates
Equivalent
Logic Cells
CLB Array (One CLB = Four Slices)
Distributed
RAM
Block
RAM
Bits(1)
DSP48As
DCMs
Maximum
User I/O
Maximum
Differential
I/O Pairs
Rows Columns
Total
CLBs
Total
Slices
XC3SD1800A
1800K
37,440
88
48
4,160
16,640
260K
1512K
84
8
519
227
XC3SD3400A
3400K
53,712
104
58
5,968
23,872
373K
2268K
126
8
469
213
Notes:
1.
By convention, one Kb is equivalent to 1,024 bits.
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XC3SD3400A-4FG676C 制造商:Xilinx 功能描述:FPGA SPARTAN-3A 3.4M GATES 53712 CELLS 667MHZ 1.2V 676FBGA - Trays 制造商:Xilinx 功能描述:SPARTAN-3ADSP FPGA 3400K 676FBGA 制造商:Xilinx 功能描述:IC FPGA 469 I/O 676FBGA
XC3SD3400A-4FG676CES 制造商:Xilinx 功能描述:
XC3SD3400A-4FG676I 功能描述:SPARTAN-3ADSP FPGA 3400K 676FBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:Spartan®-3A DSP 產(chǎn)品變化通告:Step Intro and Pkg Change 11/March/2008 標(biāo)準(zhǔn)包裝:1 系列:Virtex®-5 SXT LAB/CLB數(shù):4080 邏輯元件/單元數(shù):52224 RAM 位總計(jì):4866048 輸入/輸出數(shù):480 門數(shù):- 電源電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:1136-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5
XC3SD3400A-4FGG676C 功能描述:SPARTAN-3ADSP FPGA 3400K 676FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:Spartan®-3A DSP 標(biāo)準(zhǔn)包裝:60 系列:XP LAB/CLB數(shù):- 邏輯元件/單元數(shù):10000 RAM 位總計(jì):221184 輸入/輸出數(shù):244 門數(shù):- 電源電壓:1.71 V ~ 3.465 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:388-BBGA 供應(yīng)商設(shè)備封裝:388-FPBGA（23x23） 其它名稱:220-1241
XC3SD3400A-4FGG676I 功能描述:SPARTAN-3ADSP FPGA 3400K 676FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:Spartan®-3A DSP 產(chǎn)品變化通告:Step Intro and Pkg Change 11/March/2008 標(biāo)準(zhǔn)包裝:1 系列:Virtex®-5 SXT LAB/CLB數(shù):4080 邏輯元件/單元數(shù):52224 RAM 位總計(jì):4866048 輸入/輸出數(shù):480 門數(shù):- 電源電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:1136-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5
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