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| 型號： | XC3030L-8VQ100I |
| 廠商： | XILINX INC |
| 元件分類： | FPGA |
| 英文描述： | Field Programmable Gate Arrays (XC3000A/L, XC3100A/L) |
| 中文描述： | FPGA, 100 CLBS, 1500 GATES, 80 MHz, PQFP100 |
| 封裝： | PLASTIC, VQFP-100 |
| 文件頁數(shù)： | 45/76頁 |
| 文件大?。?/td> | 731K |
| 代理商： | XC3030L-8VQ100I |
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R
November 9, 1998 (Version 3.1)
7-47
XC3000 Series Field Programmable Gate Arrays
7
XC3000L Switching Characteristics
Xilinx maintains test specifications for each product as controlled documents. To insure the use of the most recently released
device performance parameters, please request a copy of the current test-specification revision.
XC3000L Operating Conditions
Notes:
1. At junction temperatures above those listed as Operating Conditions, all delay parameters increase by 0.3% per
°
C.
2. Although the present (1996) devices operate over the full supply voltage range from 3.0 to 5.25 V, Xilinx reserves the right to
restrict operation to the 3.0 to 3.6 V range later, when smaller device geometries might preclude operation at 5V. Operating
conditions are guaranteed in the 3.0 – 3.6 V V
CC
range.
XC3000L DC Characteristics Over Operating Conditions
Notes:
1. With no output current loads, no active input or Longline pull-up resistors, all package pins at V
CC
or GND, and the FPGA
device configured with a tie option. I
is in addition to I
.
2. Total continuous output sink current may not exceed 100 mA per ground pin. Total continuous output source may not exceed
100 mA per V
pin. The number of ground pins varies from the XC3020L to the XC3090L.
3. Not tested. Allows an undriven pin to float High. For any other purpose, use an external pull-up.
Symbol
V
CC
V
IH
V
IL
T
IN
Description
Min
3.0
2.0
-0.3
Max
3.6
V
CC
+0.3
0.8
250
Units
V
V
V
ns
Supply voltage relative to GND Commercial 0
°
C to +85
°
C junction
High-level input voltage — TTL configuration
Low-level input voltage — TTL configuration
Input signal transition time
Symbol
V
OH
V
OL
V
OH
V
OL
V
CCPD
I
CCPD
Description
Min
2.40
Max
Units
V
V
V
V
V
μ
A
High-level output voltage (@ I
OH
= –4.0 mA, V
CC
min)
Low-level output voltage (@ I
OL
= 4.0 mA, V
CC
min)
High-level output voltage (@ I
OH
= –4.0 mA, V
CC
min)
Low-level output voltage (@ I
OL
= 4.0 mA, V
CC
min)
Power-down supply voltage (PWRDWN must be Low)
Power-down supply current (V
CC(MAX)
@ T
MAX
)
Quiescent FPGA supply current in addition to I
CCPD
Chip thresholds programmed as CMOS levels
Input Leakage Current
Input capacitance, all packages except PGA175
(sample tested)
All Pins except XTL1 and XTL2
XTL1 and XTL2
Input capacitance, PGA 175
(sample tested)
All Pins except XTL1 and XTL2
XTL1 and XTL2
Pad pull-up (when selected) @ V
IN
= 0 V
3
Horizontal Longline pull-up (when selected) @ logic Low
0.40
V
CC
-0.2
0.2
2.30
10
I
CCO
1
20
+10
μ
A
μ
A
I
IL
–10
C
IN
10
15
pF
pF
15
20
0.17
2.50
pF
pF
mA
mA
I
RIN
I
RLL
0.01
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| XC3030L-8VQ64C | 功能描述:IC FPGA C-TEMP 3.3V 64-VQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:XC3000A/L 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標(biāo)準(zhǔn)包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計:3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA（34.55x34.55） |
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