參數(shù)資料
型號(hào)： XC2S600E-6FG456Q
廠商： Xilinx Inc
文件頁(yè)數(shù)： 45/108頁(yè)
文件大?。?/td> 0K
描述： IC FPGA SPARTAN-IIE 456FPBGA
產(chǎn)品變化通告： FPGA Family Discontinuation 18/Apr/2011
標(biāo)準(zhǔn)包裝： 60
系列： Spartan®-IIE
LAB/CLB數(shù)： 3456
邏輯元件/單元數(shù)： 15552
RAM 位總計(jì)： 294912
輸入/輸出數(shù)： 329
門(mén)數(shù)： 600000
電源電壓： 1.71 V ~ 1.89 V
安裝類(lèi)型： 表面貼裝
工作溫度： -40°C ~ 125°C
封裝/外殼： 456-BBGA
供應(yīng)商設(shè)備封裝： 456-FBGA
DS077-3 (v3.0) August 9, 2013
41
Product Specification
Spartan-IIE FPGA Family: DC and Switching Characteristics
R
— OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE —
Calculation of TIOOP as a Function of
Capacitance
TIOOP is the propagation delay from the O Input of the IOB
to the pad. The values for TIOOP are based on the standard
capacitive load (CSL) for each I/O standard as listed in the
For other capacitive loads, use the formulas below to calcu-
late an adjusted propagation delay, TIOOP1.
TIOOP1 = TIOOP + Adj + (CLOAD – CSL) * FL
Where:
Adj
to the I/O standard used
CLOAD is the capacitive load for the design
FL
is the capacitance scaling factor
Delay Measurement Methodology
Standard
VL(1)
VH (1)
Meas.
Point
VREF
Typ(2)
LVTTL
0
3
1.4
-
LVCMOS2
0
2.5
1.125
-
PCI33_3
Per PCI Spec
-
PCI66_3
Per PCI Spec
-
GTL
VREF – 0.2 VREF + 0.2 VREF
0.80
GTL+
VREF – 0.2 VREF + 0.2 VREF
1.0
HSTL Class I
VREF – 0.5 VREF + 0.5 VREF
0.75
HSTL Class III
VREF – 0.5 VREF + 0.5 VREF
0.90
HSTL Class IV VREF – 0.5 VREF + 0.5 VREF
0.90
SSTL3 I and II VREF – 1.0 VREF + 1.0 VREF
1.5
SSTL2 I and II VREF – 0.75 VREF + 0.75 VREF
1.25
CTT
VREF – 0.2 VREF + 0.2 VREF
1.5
AGP
VREF –
(0.2xVCCO)
VREF +
(0.2xVCCO)
VREF Per AGP
Spec
LVDS
1.2 – 0.125 1.2 + 0.125
1.2
LVPECL
1.6 – 0.3
1.6 + 0.3
1.6
Notes:
1.
Input waveform switches between VL and VH.
2.
Measurements are made at VREF Typ, Maximum, and
Minimum. Worst-case values are reported.
3.
I/O parameter measurements are made with the capacitance
values shown in the following table, Constants for Calculating
TIOOP. Refer to Application Note XAPP179 for appropriate
terminations.
4.
I/O standard measurements are reflected in the IBIS model
information except where the IBIS format precludes it.
Constants for Calculating TIOOP
Standard
CSL(1)
(pF)
FL
(ns/pF)
LVTTL Fast Slew Rate, 2 mA drive
35
0.41
LVTTL Fast Slew Rate, 4 mA drive
35
0.20
LVTTL Fast Slew Rate, 6 mA drive
35
0.13
LVTTL Fast Slew Rate, 8 mA drive
35
0.079
LVTTL Fast Slew Rate, 12 mA drive
35
0.044
LVTTL Fast Slew Rate, 16 mA drive
35
0.043
LVTTL Fast Slew Rate, 24 mA drive
35
0.033
LVTTL Slow Slew Rate, 2 mA drive
35
0.41
LVTTL Slow Slew Rate, 4 mA drive
35
0.20
LVTTL Slow Slew Rate, 6 mA drive
35
0.100
LVTTL Slow Slew Rate, 8 mA drive
35
0.086
LVTTL Slow Slew Rate, 12 mA drive
35
0.058
LVTTL Slow Slew Rate, 16 mA drive
35
0.050
LVTTL Slow Slew Rate, 24 mA drive
35
0.048
LVCMOS2
35
0.041
LVCMOS18
35
0.050
PCI 33 MHz 3.3V
10
0.050
PCI 66 MHz 3.3V
10
0.033
GTL
0
0.014
GTL+
0
0.017
HSTL Class I
20
0.022
HSTL Class III
20
0.016
HSTL Class IV
20
0.014
SSTL2 Class I
30
0.028
SSTL2 Class II
30
0.016
SSTL3 Class I
30
0.029
SSTL3 Class II
30
0.016
CTT
20
0.035
AGP
10
0.037
Notes:
1.
I/O parameter measurements are made with the capacitance
values shown above. Refer to Application Note XAPP179 for
appropriate terminations.
2.
I/O standard measurements are reflected in the IBIS model
information except where the IBIS format precludes it.
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