參數(shù)資料
型號: XC2S600E-6FG456Q
廠商: Xilinx Inc
文件頁數(shù): 107/108頁
文件大?。?/td> 0K
描述: IC FPGA SPARTAN-IIE 456FPBGA
產(chǎn)品變化通告: FPGA Family Discontinuation 18/Apr/2011
標(biāo)準(zhǔn)包裝: 60
系列: Spartan®-IIE
LAB/CLB數(shù): 3456
邏輯元件/單元數(shù): 15552
RAM 位總計: 294912
輸入/輸出數(shù): 329
門數(shù): 600000
電源電壓: 1.71 V ~ 1.89 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 125°C
封裝/外殼: 456-BBGA
供應(yīng)商設(shè)備封裝: 456-FBGA
98
DS077-4 (v3.0) August 9, 2013
Product Specification
Spartan-IIE FPGA Family: Pinout Tables
R
— OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE —
DONE
3
AE26
-
DONE
PROGRAM
-
AC24
-
PROGRAM
I/O (INIT), L101N_YY
3
AD25
All
-
I/O (INIT), L101N_YY
I/O (D7), L101P_YY
3
AD26
All
-
I/O (D7), L101P_YY
I/O, L100N
3
AC25
-
I/O, L100N
I/O, L100P
3
AC26
-
I/O, L100P
I/O, L99N
3
AB22
XC2S600E
-
I/O, L99N_Y
I/O, L99P
3
AB23
XC2S600E
-
I/O
I/O, L99P_Y
I/O, L98N_YY
3
AB25
All
-
I/O, L98N_YY
I/O, L98P_YY
3
AB26
All
-
I/O, L98P_YY
I/O, L97N
3
AA23
-
I/O, L97N_Y
I/O, L97N
I/O, L97P
3
AA24
-
I/O, L97P_Y
I/O, L97P
I/O, VREF Bank 3,
L96N
3
AA25
XC2S600E
All
I/O, VREF Bank 3,
L96N
I/O, VREF Bank 3,
L96N_Y
I/O, L96P
3
AA26
XC2S600E
-
I/O, L96P
I/O, L96P_Y
I/O, L95N
3
AA22
XC2S600E
-
I/O, L95N_Y
I/O, L95P
3
Y22
XC2S600E
-
I/O
I/O, L95P_Y
I/O, L94N
3
Y23
XC2S400E
-
I/O, L94N_Y
I/O, L94N
I/O, L94P
3
Y24
XC2S400E
-
I/O, L94P_Y
I/O, L94P
I/O, L93N
3
Y25
XC2S600E
-
I/O, L93N
I/O, L93N_Y
I/O, L93P
3
Y26
XC2S600E
-
I/O, L93P
I/O, L93P_Y
I/O, VREF Bank 3,
L92N_YY
3
W21
All
I/O, VREF Bank 3,
L92N_YY
I/O, VREF Bank 3,
L92N_YY
I/O, L92P_YY
3
W22
All
-
I/O, L92P_YY
I/O
3
Y21
-
I/O
I/O, L91N_YY
3
W25
All
-
I/O, L91N_YY
I/O, L91P_YY
3
W26
All
-
I/O, L91P_YY
I/O
3
W20
-
I/O
I/O, L90N
3
V19
XC2S400E
-
I/O, L90N_Y
I/O, L90N
I/O, L90P
3
V20
XC2S400E
-
I/O, L90P_Y
I/O, L90P
I/O, L89N
3
V21
XC2S600E
-
I/O, VREF Bank 3,
L89N_Y
I/O, L89P
3
V22
XC2S600E
-
I/O
I/O, L89P_Y
I/O
3
V23
-
I/O
I/O, L88N_YY
3
V24
All
-
I/O, L88N_YY
FG676 Pinouts (XC2S400E, XC2S600E) (Continued)
Pad Name
Pin
LVDS Async.
Output Option
VREF
Option
Device-Specific Pinouts
Function
Bank
XC2S400E
XC2S600E
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