參數(shù)資料
型號: WM8191
廠商: Wolfson Microelectronics
英文描述: TVS BI-DIR 6.0V 400W SMA
中文描述: 14位6MSPS獨聯(lián)體/防治荒漠化公約模擬前端/數(shù)字轉(zhuǎn)換器
文件頁數(shù): 18/27頁
文件大小: 355K
代理商: WM8191
WM8191
Advanced Information
WOLFSON MICROELECTRONICS LTD
AI Rev 3.1 April 2001
18
MCLK
VSMP
(VDEL = 000) INTVSMP
POSNNEG = 1
(VDEL = 001) INTVSMP
(VDEL = 010) INTVSMP
(VDEL = 011) INTVSMP
(VDEL = 100) INTVSMP
(VDEL = 101) INTVSMP
(VDEL = 110) INTVSMP
(VDEL = 111) INTVSMP
POSNNEG = 0
(VDEL = 000) INTVSMP
(VDEL = 001) INTVSMP
(VDEL = 010) INTVSMP
(VDEL = 011) INTVSMP
(VDEL = 100) INTVSMP
(VDEL = 101) INTVSMP
(VDEL = 110) INTVSMP
(VDEL = 111) INTVSMP
INPUT
PINS
Figure 18 Internal VSMP Pulses Generated by Programmable VSMP Detect Circuit
REFERENCES
The ADC reference voltages are derived from an internal bandgap reference, and buffered to pins
VRT and VRB, where they must be decoupled to ground. Pin VRX is driven by a similar buffer, and
also requires decoupling. The output buffer from the RLCDAC also requires decoupling at pin
VRLC/VBIAS.
POWER SUPPLY
The WM8191 can run from a 5V single supply or from split 5V (core) and 3.3V (digital interface)
supplies.
POWER MANAGEMENT
Power management for the device is performed via the Control Interface. The device can be powered
on or off completely by the EN bit. Alternatively, when control bit SELPD is high, only blocks selected
by further control bits (SELDIS[3:0]) are powered down. This allows the user to optimise power
dissipation in certain modes, or to define an intermediate standby mode to allow a quicker recovery
into a fully active state. In Line-by-Line operation, the green and blue channel PGAs are
automatically powered down.
All the internal registers maintain their previously programmed value in power down modes and the
control interface inputs remain active. Table 3 summarises the power down control bit functions.
EN
0
1
X
SELDPD
0
0
1
Device completely powers down.
Device completely powers up.
Blocks with respective SELDIS[3:0] bit high are disabled.
Table 3 Power Down Control
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