參數(shù)資料
型號(hào): WJLXT972MLC.A4SE001
廠商: CORTINA SYSTEMS INC
元件分類: 網(wǎng)絡(luò)接口
英文描述: DATACOM, ETHERNET TRANSCEIVER, PQFP48
封裝: LEAD FREE, LQFP-48
文件頁數(shù): 42/94頁
文件大小: 1235K
代理商: WJLXT972MLC.A4SE001
Intel
LXT972M Single-Port 10/100 Mbps PHY Transceiver
47
Document Number: 302875-004
Revision Date: February 18, 2005
5.7.3
100BASE-X Protocol Sublayer Operations
With respect to the 7-layer communications model, the LXT972M Transceiver is a Physical Layer
1 (PHY) device.
The LXT972M Transceiver implements the following sublayers of the reference model defined by
the IEEE 802.3 standard, and discussed from the reference model point of view:
Figure 18 shows the LXT972M Transceiver protocol sublayers.
Figure 18. Intel LXT972M Protocol Sublayers
Encoder/Decoder
Serializer/De-serializer
Link/Carrier Detect
PCS
Sublayer
PMA
Sublayer
MII Interface
Intel LXT972M
Transceiver
100BASE-TX
Scrambler/
De-scrambler
PMD
Sublayer
B3514-01
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