參數(shù)資料
型號(hào)： WJLXT972MLC.A4SE000
廠商： CORTINA SYSTEMS INC
元件分類(lèi)： 網(wǎng)絡(luò)接口
英文描述： DATACOM, ETHERNET TRANSCEIVER, PQFP48
封裝： LEAD FREE, LQFP-48
文件頁(yè)數(shù)： 89/94頁(yè)
文件大?。?/td> 1235K
代理商： WJLXT972MLC.A4SE000
Intel
LXT972M Single-Port 10/100 Mbps PHY Transceiver
Datasheet
9
Document Number: 302875-004
Revision Date: February 18, 2005
Intel
LXT972M Transceiver Datasheet Revision 002
Revision Date: July 14, 2004
Page
Description
1
Text changed.
10
Figure 1 “Intel LXT972M Transceiver Block Diagram” - Deleted ECL Driver from figure.
21
Section 5.1, “Introduction” - Text changed.
22
Section 5.2.1.1, “Twisted-Pair Interface” - Added text on MDI crossover.
23
Section 5.2.1.2, “Fault Detection and Reporting” - Text changed.
26
Section 5.3.2.1, “External Crystal/Oscillator” - Text changed.
30
Table 12 “Hardware Configuration Settings for Intel
LXT972M Transceiver” - Bit value for 0.8
changed.
33
Section 5.5.2, “Parallel Detection” - Text changed.
36
Section 5.6.2, “Transmit Enable” - Text changed.
37
Section 5.6.4, “Carrier Sense” - Text changed.
45
Section 5.7.3.1.1, “Preamble Handling” - Text changed.
47
Section 5.7.3.2.1, “Link” - Added text.
47
Section 5.7.3.2.2, “Link Failure Override” - Added text.
47
Section 5.7.3.2.4, “Receive Data Valid” - Text changed.
48
Section 5.7.3.3.2, “Polarity Correction” - Text changed.
53
Section 5.9.4, “LED Pulse Stretching” - Text changed.
80
Table 46 “Auto-Negotiation Next Page Transmit Register - Address 7, Hex 7” - Bits 7.10:0 and 7.13
changed.
80
Table 47 “Auto-Negotiation Link Partner Next Page Receive Register - Address 8, Hex 8” - Bits
8.18 and 8.10:0 changed.
85
Table 52 “LED Configuration Register - Address 20, Hex 14” - Bit 20.0 changed.
Intel LXT972M Transceiver Datasheet Revision 001
Revision Date: July 2, 2004
Page
Description
-
Initial release of this document.
相關(guān)PDF資料
PDF描述
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WJLXT972MLC.A4 DATACOM, ETHERNET TRANSCEIVER, PQFP48
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