參數(shù)資料
型號(hào)： W986416BH-7
廠商： WINBOND ELECTRONICS CORP
元件分類(lèi)： DRAM
英文描述： 4M X 16 SYNCHRONOUS DRAM, 5.4 ns, PDSO54
封裝： 0.400 INCH, 0.80 MM PITCH, TSOP2-54
文件頁(yè)數(shù)： 4/42頁(yè)
文件大?。?/td> 2061K
代理商： W986416BH-7
W986416BH
1M x 16 bit x 4 Banks SDRAM
Revision 1.4
Publication Release Date: July, 1999
- 12 -
Table 2 Address Sequence of Sequential Mode
DATA
Access Address
Burst Length
Data 0
n
BL= 2 (disturb address is A0)
Data 1
n + 1
No address carry from A0 to A1
Data 2
n + 2
BL= 4 (disturb addresses are A0 and A1)
Data 3
n + 3
No address carry from A1 to A2
Data 4
n + 4
Data 5
n + 5
BL= 8 (disturb addresses are A0, A1 and A2)
Data 6
n + 6
No address carry from A2 to A3
Data 7
n + 7
. Addressing Sequence of Sequential Mode
A column access is performed by increasing the address from the column address which is input to the
device. The disturb address is varied by the Burst Length as shown in Table 2.
. Addressing Sequence of Interleave Mode
A column access is started in the input column address and is performed by inverting the address bit in the
sequence shown in Table 3.
Table 3 Address Sequence of Interleave Mode
DATA
Access
Address
Burst Length
Data 0
A8 A7 A6 A5 A4 A3 A2 A1 A0
BL = 2
Data 1
A8 A7 A6 A5 A4 A3 A2 A1 A0
Data 2
A8 A7 A6 A5 A4 A3 A2 A1 A0
BL = 4
Data 3
A8 A7 A6 A5 A4 A3 A2 A1 A0
Data 4
A8 A7 A6 A5 A4 A3 A2 A1 A0
Data 5
A8 A7 A6 A5 A4 A3 A2 A1 A0
BL = 8
Data 6
A8 A7 A6 A5 A4 A3 A2 A1 A0
Data 7
A8 A7 A6 A5 A4 A3 A2 A1 A0
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
W986416CH 制造商:WINBOND 制造商全稱(chēng):Winbond 功能描述:1M x 16 BIT x 4 BANKS SDRAM
W986416CH-6 制造商:WINBOND 制造商全稱(chēng):Winbond 功能描述:x16 SDRAM
W986416CH-7 制造商:Winbond Electronics Corp 功能描述:SDRAM, 4M x 16, 54 Pin, Plastic, TSOP
W986416CH-75 制造商:WINBOND 制造商全稱(chēng):Winbond 功能描述:x16 SDRAM
W986416CH-8H 制造商:WINBOND 制造商全稱(chēng):Winbond 功能描述:x16 SDRAM
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