參數(shù)資料
型號: W986416BH-7
廠商: WINBOND ELECTRONICS CORP
元件分類: DRAM
英文描述: 4M X 16 SYNCHRONOUS DRAM, 5.4 ns, PDSO54
封裝: 0.400 INCH, 0.80 MM PITCH, TSOP2-54
文件頁數(shù): 27/42頁
文件大小: 2061K
代理商: W986416BH-7
W986416BH
1M x 16 bit x 4 Banks SDRAM
Revision 1.4
Publication Release Date: July, 1999
- 33 -
Autoprecharge Timing ( Read Cycle )
Read
AP
0
11
10
9
8
7
6
5
4
3
2
1
Q0
Read
AP
Act
Q1
Read
AP
Act
Q1
Q2
AP
Act
Read
Act
Q0
Q3
(1) CAS Latency=2
Read
Act
AP
When the Auto precharge command is asserted, the period from Bank Activate command to
the start of internal precgarging must be at least t RAS(min).
represents the Read with Auto precharge command.
represents the start of internal precharging.
represents the Bank Activate command.
Note )
tRP
( a ) burst length = 1
Command
( b ) burst length = 2
Command
( c ) burst length = 4
Command
( d ) burst length = 8
Command
DQ
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
tRP
Q0
Read
AP
Act
Q0
Read
AP
Act
Q1
Q0
Read
AP
Act
Q1
Q2
Q3
Read
AP
Act
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
(2) CAS Latency=3
tRP
( a ) burst length = 1
Command
( b ) burst length = 2
Command
( c ) burst length = 4
Command
( d ) burst length = 8
Command
DQ
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