參數(shù)資料
型號： W9751G8JB-18
廠商： WINBOND ELECTRONICS CORP
元件分類： DRAM
英文描述： DDR DRAM, PBGA84
封裝： 8 X 12.50 MM, ROHS COMPLIANT, WBGA-84
文件頁數(shù)： 16/17頁
文件大?。?/td> 1458K
代理商： W9751G8JB-18
8/16
Block diagram and pin configuration
– Continued
BD6237FM
Fig. 36 BD6237FM
Fig. 37 HSOPM28
Table 7 BD6237FM
Pin
Name
Function
1,2
OUT1A
Driver output
3,4
RNF A
Power stage ground
6,7
OUT2A
Driver output
8
GND
Small signal ground
9
VREFA
Duty setting pin
10
RINA
Control input (reverse)
11
FINA
Control input (forward)
12
VCC
Power supply
13,14
VCC
Power supply
15,16
OUT1B
Driver output
17,18
RNFB
Power stage ground
20,21
OUT2B
Driver output
22
GND
Small signal ground
23
VREFB
Duty setting pin
24
RINB
Control input (reverse)
25
FINB
Control input (forward)
26
VCC
Power supply
27,28
VCC
Power supply
FIN
GND
Ground
Note: All pins not described above are NC pins.
26
28
11
10
CTRL
PROTECT
FINA
RINA
VCC
3
RNFA
9
VREFA
DUTY
2
OUT1A
6
OUT2A
22
GND
12
14
25
24
CTRL
PROTECT
FINB
RINB
VCC
17
RNFB
23
VREFB
DUTY
16
OUT1B
20
OUT2B
8
GND
FIN
GND
1
7
4
27
13
15
21
18
OUT1A
GND
RNFA
NC
OUT2A
GND
VREFA
RINA
FINA
VCC
GND
VCC
FINB
RINB
VREFB
GND
OUT2B
NC
RNFB
OUT1B
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