參數(shù)資料
型號： W78CE354P
廠商： WINBOND ELECTRONICS CORP
英文描述： MONITOR MICROCONTROLLER
中文描述： 顯示器單片機
文件頁數(shù)： 14/44頁
文件大?。?/td> 426K
代理商： W78CE354P
W78C354
- 14 -
5. CONTREG5: Control Register5
BIT
0
1
2
3
4
5
6
NAME
-
-
-
-
-
HDSEL
DPARAINT
FUNCTION
Reserved.
Reserved.
Reserved.
Reserved.
Reserved.
HCLAMP Source SELect.
Enable parabola interrupt with dummy signal.
DPARAINT = 0; V dummy signal will generate V
EVENT
interrupt.
DPARAINT = 1; V dummy signal will not generate V
EVENT
interrupt.
Reserved.
7
-
E. I/O Port
The I/O ports available in the W78C354 vary with the package, as shown in the table below:
I/O PORT
Port 1
Port 2
Port 3
Port 4
68-PIN PLCC
6 bits
8 bits
8 bits
7 bits
48-PIN DIP
6 bits
8 bits
7 bits
N.A.
40-PIN DIP
6 bits
8 bits
3 bits
N.A.
P1, P2, and P3 are the SFR latches of ports 1, 2, and 3, respectively. Writing a "1" to a bit of a port
SFR (P1, P2, or P3) causes the corresponding port output pin to switch to high. Writing a "0" causes
the port output pin to switch to low. When a port is used as an input, the external state of the port pin
will be read into the port SFR (i.e., if the external state is low, the corresponding SFR bit will contain a
"0"; if it is high, the bit will contain a "1"). The block diagrams and control registers are shown below.
E-1 Port 1
Besides general purpose I/O functions, port 1 provides the functions shown in the following table.
PINS
SPECIAL FUNCTION
SPECIAL FUNCTION
CONTROL BIT
-
-
-
-
P14SF
P15SF
DESCRIPTION
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
ISCL
ISDA
DSCL
DSDA
HCLAMP
SOA
s/w I
2
C SCL pin
s/w I
2
C SDA pin
DDC port's SCL pin
DDC port's SDA pin
H-clamp pulse output
SOA output
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