參數(shù)資料
型號(hào): W6692ACF
廠商: WINBOND ELECTRONICS CORP
元件分類: 數(shù)字傳輸電路
英文描述: DATACOM, ISDN CONTROLLER, PQFP100
封裝: QFP-100
文件頁(yè)數(shù): 74/98頁(yè)
文件大?。?/td> 584K
代理商: W6692ACF
Data Sheet
W6692A PCI ISDN S/T-Controller
Publication Release Date:
Mar,2000
Revision 1.0
-76 -
Used in transparent mode only. These bits mask the second byte address comparisons. If the mask bit is "1", the
corresponding bit comparison with B1_ADR2 is disabled.
0: Unmask comparison
1: Mask comparison
8.2.10 B1_ch Address Register 1
B1_ADR1
Read/Write
Address A4H/29H
Value after reset: 00H
7
6
5
4
3
2
1
0
RA17
RA16
RA15
RA14
RA13
RA12
RA11
RA10
RA17-10
Address Bits
Used in transparent mode only. These bits are used for the first byte address comparisons.
8.2.11 B1_ch Address Register 2
B1_ADR2
Read/Write
Address A8H/2AH
Value after reset: 00H
7
6
5
4
3
2
1
0
RA27
RA26
RA25
RA24
RA23
RA22
RA21
RA20
RA27-20
Address Bits
Used in transparent mode only. These bits are used for the second byte address comparisons.
8.2.12 B1_ch Receive Frame Byte Count Low
B1_RBCL
Read Address ACH/2BH
Value after reset: 00H
7
6
5
4
3
2
1
0
RBC7
RBC6
RBC5
RBC4
RBC3
RBC2
RBC1
RBC0
RBC7-0
Receive Byte Count
Used in transparent mode only. Eight least significant bits of the total number of bytes are in a received frame. These bits are
valid only after a RME interrupt and remain valid until the frame is acknowledge via the RACK bit.
8.2.13 B1_ch Receive Frame Byte Count High
B1_RBCH
Read Address B0H/2CH
Value after reset: 00H
7
6
5
4
3
2
1
0
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