- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄68457 > W3H32M72E-667SB2M (MICROSEMI CORP-PMG MICROELECTRONICS) 32M X 72 DDR DRAM, 0.65 ns, PBGA208 PDF資料下載
參數(shù)資料
| 型號(hào)： | W3H32M72E-667SB2M |
| 廠商： | MICROSEMI CORP-PMG MICROELECTRONICS |
| 元件分類： | DRAM |
| 英文描述： | 32M X 72 DDR DRAM, 0.65 ns, PBGA208 |
| 封裝： | 16 X 20 MM, 1 MM PITCH, PLASTIC, BGA-208 |
| 文件頁數(shù)： | 22/25頁 |
| 文件大?。?/td> | 1062K |
| 代理商： | W3H32M72E-667SB2M |
W3H32M72E-XSB2X
November 2010 2010 Microsemi Corporation. All rights reserved.
6
Microsemi Corporation (602) 437-1520 www.whiteedc.com
Rev. 3
www.microsemi.com
Microsemi Corporation reserves the right to change products or specications without notice.
VREF must track VCCQ/2, VREF must be within ±0.3V
with respect to VCCQ/2 during supply ramp time; VCCQ
≥ VREF must be met at all times
Apply VTT; The VTT voltage ramp time from when
VCCQ (MIN) is achieved to when VTT (MIN) is
achieved must be no greater than 500ms
2.
For a minimum of 200μs after stable power nd clock (CK,
CK#), apply NOP or DESELECT commands and take CKE
HIGH.
3.
Wait a minimum of 400ns, then issue a PRECHARGE ALL
command.
4.
Issue an LOAD MODE command to the EMR(2). (To issue
an EMR(2) command, provide LOW to BA0, provide HIGH
to BA1.)
5.
Issue a LOAD MODE command to the EMR(3). (To issue
an EMR(3) command, provide HIGH to BA0 and BA1.)
6.
Issue an LOAD MODE command to the EMR to enable
DLL. To issue a DLL ENABLE command, provide LOW to
BA1 and A0, provide HIGH to BA0. Bits E7, E8, and E9 can
be set to “0” or “1”; Micron recommends setting them to “0.”
7.
Issue a LOAD MODE command for DLL RESET. 200 cycles
of clock input is required to lock the DLL. (To issue a DLL
RESET, provide HIGH to A8 and provide LOW to BA1, and
BA0.) CKE must be HIGH the entire time.
8.
Issue PRECHARGE ALL command.
9.
Issue two or more REFRESH commands, followed by a
dummy WRITE.
10. Issue a LOAD MODE command with LOW to A8 to initialize
device operation (i.e., to program operating parameters
without resetting the DLL).
11. Issue a LOAD MODE command to the EMR to enable
OCD default by setting bits E7, E8, and E9 to “1,” and then
setting all other desired parameters.
12. Issue a LOAD MODE command to the EMR to enable OCD
exit by setting bits E7, E8, and E9 to “0,” and then setting all
other desired parameters.
13. Issue a LOAD MODE command with LOW to A8 to initialize
device operation (i.e., to program operating parameters
without resetting the DLL).
14. Issue a LOAD MODE command to the EMR to enable OCD
default by setting bits E7,E8, and E9 to “1,” and then setting
all other desired parameters.
15. Issue a LOAD MODE command to the EMR to enable OCD
exit by setting bits E7, E8, and E9 to “0,” and then setting all
other desired parameters.
The DDR2 SDRAM is now initialized and ready for normal
operation 200 clocks after DLL RESET (in step 7).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| W3H32M72E-667SBC | 32M X 72 DDR DRAM, 0.65 ns, PBGA208 |
| W3H64M16E-400BC | 64M X 16 DDR DRAM, 0.6 ns, PBGA79 |
| W3H64M64E-400SBC | 64M X 64 DDR DRAM, 0.6 ns, PBGA208 |
| W3H64M72E-400ESI | 64M X 72 DDR DRAM, 0.6 ns, PBGA208 |
| W3H64M72E-400ESI | 64M X 72 DDR DRAM, 0.6 ns, PBGA208 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W3H32M72E-667SB2M/T/R | 制造商:Microsemi Corporation 功能描述:PBGA,32M X72,DDR2 SDRAM, 1.8V - Tape and Reel |
| W3H32M72E-667SBC | 制造商:Microsemi Corporation 功能描述:32M X 72 DDR2, 1.8V, 667MHZ, 208PBGA COMMERICAL TEMP. - Bulk |
| W3H32M72E-667SBI | 制造商:Microsemi Corporation 功能描述:32M X 72 DDR2, 1.8V, 667MHZ, 208PBGA INDUSTRIAL TEMP. - Bulk |
| W3H32M72E-667SBM | 制造商:PMG/Microsemi 功能描述: |
| W3H32M72E-ES | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:32M x 72 DDR2 SDRAM 208 PBGA Multi-Chip Package |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。