參數(shù)資料
型號(hào): W3H128M72ER-667SBM
廠商: WHITE ELECTRONIC DESIGNS CORP
元件分類(lèi): DRAM
英文描述: 128M X 72 DDR DRAM, 0.5 ns, PBGA255
封裝: 23 X 21 MM, 1.27 MM PITCH, PLASTIC, BGA-255
文件頁(yè)數(shù): 27/34頁(yè)
文件大?。?/td> 1028K
代理商: W3H128M72ER-667SBM
W3H128M72ER-XNBX
33
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
February 2009
Rev. 6
PRELIMINARY
White Electronic Designs Corp. reserves the right to change products or specications without notice.
Document Title
128M x 72 Registered DDR2 SDRAM 208 PBGA Multi-Chip Package
Revision History
Rev #
History
Release Date
Status
Rev 0
Initial Release
June 2008
Advanced
Rev 1
Changes (Pg. 1, 26)
1.1 Add weight W3H128M72ER-XSBX - 4grams max
1.2 Move location of saving to the saving box
1.3 Add BGA thermal resistance
1.4 Changed package height dimensions
October 2008
Preliminary
Rev 2
Changes (Pg. 1, 2, 5, 6, 7, 8, 9, 13, 14, 16, 19, 22 - 28, 30)
1.1 Updated electrical characteristics throughout data sheet
1.2 Removed I/O supply voltage = 1.8V ± 0.1V - (SSTL-18
compatible)
1.3 Corrected SPACE SAVINGS vs FPBGA to Space savings
vs FBGA
1.4 Functional block diagram - Removed note
1.5 Changed VCC = I/O + Core; VCCQ is common to VCC
1.6 Removed VCCQ from Table 1
1.7 Replaced Figure 4 on pg. 7
1.8 Replaced Figure 8 on pg. 8
1.9 Removed VCCQ from CD Operating Conditions, VCC and
VCCQ are tied on the device
October 2008
Preliminary
Rev 3
Changes (Pg. 1, 3)
3.1 Correction to Figure 1, removed actual size, moved 45%
and 55% to saving box
3.2 Correction to Figure 3, replace column 11 with corrected
pinout, and #'s to K1 and K7
December 2008
Preliminary
Rev 4
Changes (Pg. 3)
4.1 Correction to Figure 3, change B2 and C2 to VSS
December 2008
Preliminary
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