參數(shù)資料
型號: W28J321BB90L
廠商: WINBOND ELECTRONICS CORP
元件分類: PROM
英文描述: 2M X 16 FLASH 2.7V PROM, 90 ns, PBGA48
封裝: 8 X 11 MM, 0.75 MM PITCH, TFBGA-48
文件頁數(shù): 6/47頁
文件大?。?/td> 1385K
代理商: W28J321BB90L
W28J321B/T
- 14 -
Write
Writing commands to the CUI enable reading of device data and identifier codes. They also control
inspection and clearing of the status register. When VDD = 2.7V to 3.6V and VPP = VPPH1/2, the CUI
additionally controls block erase, full chip erase, word write and lock-bit configuration.
The Block Erase command requires appropriate command data and an address within the block to be
erased. The Full Chip Erase command requires appropriate command data and an address within the
device. The Word Write command requires the command and address of the location to be written.
Set Permanent and Block Lock-Bit commands require the command and address within the device
(Permanent Lock) or block within the device (Block Lock) to be locked. The Clear Block Lock-Bits
command requires the command and address within the device.
The CUI does not occupy an addressable memory location. A write occurs when #WE and #CE are
active. The address and data needed to execute a command are latched on the rising edge of #WE or
#CE, whichever occurs first. Standard microprocessor write timings are used.
Figures 17 and 18 illustrate #WE and #CE controlled write operations.
9. COMMAND DEFINITIONS
When VPP VPPLK, read operations from the status register, identifier codes, or blocks are enabled.
Setting VPPH1/2 = VPP enables successful block erase, full chip erase, word write and lock-bit
configuration operations.
Device operations are selected by writing specific commands into the CUI. Table 3 defines these
commands.
Table 2 Bus Operations (note 1, 2)
MODE
#RESET
#CE
#OE
#WE
ADDRESS
VPP
DQ0
15
Read (note 7)
VIH
VIL
VIH
X
DOUT
Output Disable
VIH
VIL
VIH
X
High Z
Standby
VIH
X
High Z
Reset (note 3)
VIL
X
High Z
Read Identifier Codes
(note 7)
VIH
VIL
VIH
See
Figure 4, 5
X
Note 4
Write (note 5, 6, 7)
VIH
VIL
VIH
VIL
X
DIN
Notes:
1. Refer to DC Characteristics. When VPP ≤ VPPLK, memory contents can be read, but not altered.
2. X can be VIL or VIH for control pins and addresses, and VPPLK or VPPH1/2 for VPP. See DC Characteristics for VPPLK voltages.
3. #RESET at VSS ±0.2V ensures the lowest power consumption.
4. See Read Identifier Codes Commands section for details.
5. Command writes involving block erase, full chip erase, word write or lock-bit configuration are reliably executed when VPP =
VPPH1/2 and VDD = 2.7V to 3.6V.
6. Refer to Table 3 for valid DIN during a write operation.
7. Never hold #OE low and #WE low at the same timing.
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