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參數(shù)資料
| 型號： | W25Q128BVFAP |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | PROM |
| 英文描述： | 128M X 1 SPI BUS SERIAL EEPROM, PDSO16 |
| 封裝： | 0.300 INCH, GREEN, SOIC-16 |
| 文件頁數(shù)： | 39/74頁 |
| 文件大?。?/td> | 855K |
| 代理商： | W25Q128BVFAP |
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W25Q128BV
- 44 -
DO
(IO
1)
7.2.25 64KB Block Erase (D8h)
The Block Erase instruction sets all memory within a specified block (64K-bytes) to the erased state of all
1s (FFh). A Write Enable instruction must be executed before the device will accept the Block Erase
Instruction (Status Register bit WEL must equal 1). The instruction is initiated by driving the /CS pin low
and shifting the instruction code “D8h” followed a 24-bit block address (A23-A0) (see Figure 2). The Block
Erase instruction sequence is shown in Figure 23.
The /CS pin must be driven high after the eighth bit of the last byte has been latched. If this is not done the
Block Erase instruction will not be executed. After /CS is driven high, the self-timed Block Erase instruction
will commence for a time duration of tBE (See AC Characteristics). While the Block Erase cycle is in
progress, the Read Status Register instruction may still be accessed for checking the status of the BUSY
bit. The BUSY bit is a 1 during the Block Erase cycle and becomes a 0 when the cycle is finished and the
device is ready to accept other instructions again. After the Block Erase cycle has finished the Write
Enable Latch (WEL) bit in the Status Register is cleared to 0. The Block Erase instruction will not be
executed if the addressed page is protected by the Block Protect (CMP, SEC, TB, BP2, BP1, and BP0)
bits (see Status Register Memory Protection table).
/CS
CLK
DI
(IO
0)
Mode 0
Mode 3
0
1
2
3
4
5
6
7
Instruction (D8h)
8
9
29
30
31
24-Bit Address
23
22
2
1
0
High Impedance
*
Mode 0
Mode 3
= MSB
*
Figure 23. 64KB Block Erase Instruction Sequence Diagram
相關(guān)PDF資料 |
PDF描述 |
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| W25Q128BVEIP | 128M X 1 SPI BUS SERIAL EEPROM, PDSO8 |
| W25Q128BVFIP | 128M X 1 SPI BUS SERIAL EEPROM, PDSO16 |
| W25Q16CLSFIP | 16M X 1 SPI BUS SERIAL EEPROM, PDSO16 |
| W25Q16CLDAIG | 16M X 1 SPI BUS SERIAL EEPROM, PDIP8 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W25Q128BVFIG | 制造商:Winbond Electronics Corp 功能描述:Flash Serial-SPI 3.3V 128Mbit 16M x 8bit 8.5ns 16-Pin SOIC 制造商:Winbond Electronics Corp 功能描述:128MB SPI FLASH |
| W25Q128BVFIP | 制造商:WINBOND 制造商全稱:Winbond 功能描述:3V 128M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI |
| W25Q128FV | 制造商:WINBOND 制造商全稱:Winbond 功能描述:SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI |
| W25Q128FVAIG | 制造商:WINBOND 制造商全稱:Winbond 功能描述:3V 128M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI |
| W25Q128FVAIP | 制造商:WINBOND 制造商全稱:Winbond 功能描述:3V 128M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI |
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