參數(shù)資料
型號(hào): VL6524
廠商: 意法半導(dǎo)體
英文描述: VGA single-chip camera module
中文描述: 顯卡單芯片相機(jī)模塊
文件頁(yè)數(shù): 39/70頁(yè)
文件大小: 505K
代理商: VL6524
VL6524/VS6524
Host communication - I2C control interface
39/70
Random location, single data read
When a location is to be read, but the value of the stored index is not known, a write
message with no data byte must be written first, specifying the index. The read message
then completes the message sequence. To avoid relinquishing the serial to bus to another
master a repeated start condition is asserted between the write and read messages.
As mentioned in the previous example, the read message is terminated with a negative
acknowledge (A) from the master.
Figure 27.
16-bit Index, 8-bit data random index, single data read
Random location, single data read
Multiple location write
For messages with more than 1 data byte the internal register index is automatically
incremented for each byte of data output, making it possible to write data bytes to
consecutive adjacent internal registers without having to send explicit indexes prior to
sending each data byte.
Figure 28.
16-bit index, 8-bit data multiple location write
Multiple location write
‘0’ (Write)
S
DEV ADDR R/W A
DATA
A
DATA
A
INDEX[7:0]
INDEX[15:0]
value, M
INDEX[15:8]
DATA
DATA[7:0]
DATA[7:0]
Sr
DEV ADDR R/W A
‘1’ (Read)
P
A
Previous Index Value, K
Index M
No Data Write
Data Read
A = Acknowledge
A = Negative Acknowledge
S = START Condition
Sr = repeated START
P = STOP Condition
From Slave to Master
From Master to Slave
‘0’ (Write)
S
DEV ADDR R/W A
DATA
P
A/A
DATA
A
DATA
A
INDEX[7:0]
DATA[7:0]
INDEX[15:0]
value, M
DATA[7:0]
INDEX[15:8]
DATA
A
DATA[7:0]
DATA[7:0]
N Bytes of Data
Previous Index Value, K
Index M
Index (M + N - 1)
A = Acknowledge
A = Negative Acknowledge
S = START Condition
Sr = repeated START
P = STOP Condition
From Slave to Master
From Master to Slave
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