參數(shù)資料
型號： VG36128161BFL-7H
廠商： VANGUARD INTERNATIONAL SEMICONDUCTOR CORP
元件分類： DRAM
英文描述： 8M X 16 SYNCHRONOUS DRAM, 5.4 ns, PBGA54
封裝： 10 X 9 MM, VFBGA-54
文件頁數(shù)： 15/69頁
文件大?。?/td> 1335K
代理商： VG36128161BFL-7H
Document :1G5-0183
Rev.5
Page 22
VIS
VG36128401B / VG36128801B / VG36128161B
CMOS Synchronous Dynamic RAM
9.3 Write to Read Command Interval
The write command to read command interval is also a minimum of 1 cycle. Only the write data before the read command
will be written. The data bus must be Hi-Z at least one cycle prior to the first DOUT.
WRITE to READ Command Interval
9.4 Read to Write Command Interval
During a read cycle, READ can be interrupted by WRITE.
DQM must be in High at least 3 clocks prior to the write command. There is a restriction to avoid a data conflict. The data
bus must be Hi-Z using DQM before Write.
Burst lengh=4
CLK
Command
CAS latency=2
DQ
Command
CAS latency=3
DQ
QB0
QB3
QB2
QB1
WRITE A
Write A
T0
T1
T2
T3
T4
T5
T6
T7
T8
QB0
QB3
QB2
QB1
1 cycle
Read B
DA0
Read B
DA0
Hi-Z
相關(guān)PDF資料
PDF描述
VG36128161BT-7H 8M X 16 SYNCHRONOUS DRAM, 5.4 ns, PDSO54
VG36128161BFL-7L 8M X 16 SYNCHRONOUS DRAM, 5.4 ns, PBGA54
VG95234E32-5P1X 2 CONTACT(S), ALUMINUM ALLOY, MALE, MIL SERIES CONNECTOR, CLAMP AND CRIMP, PLUG
VG95234E32-5P1Y 2 CONTACT(S), ALUMINUM ALLOY, MALE, MIL SERIES CONNECTOR, CLAMP AND CRIMP, PLUG
VG95234E32-5P1Z 2 CONTACT(S), ALUMINUM ALLOY, MALE, MIL SERIES CONNECTOR, CLAMP AND CRIMP, PLUG
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
VG36128161BT 制造商:VML 制造商全稱:VML 功能描述:CMOS Synchronous Dynamic RAM
VG36128401A 制造商:VML 制造商全稱:VML 功能描述:CMOS Synchronous Dynamic RAM
VG36128401BT 制造商:VML 制造商全稱:VML 功能描述:CMOS Synchronous Dynamic RAM
VG36128801A 制造商:VML 制造商全稱:VML 功能描述:CMOS Synchronous Dynamic RAM
VG36128801BT 制造商:VML 制造商全稱:VML 功能描述:CMOS Synchronous Dynamic RAM
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*