參數(shù)資料
型號: VG36128161BFL-7H
廠商: VANGUARD INTERNATIONAL SEMICONDUCTOR CORP
元件分類: DRAM
英文描述: 8M X 16 SYNCHRONOUS DRAM, 5.4 ns, PBGA54
封裝: 10 X 9 MM, VFBGA-54
文件頁數(shù): 13/69頁
文件大小: 1335K
代理商: VG36128161BFL-7H
Document :1G5-0183
Rev.5
Page 20
VIS
VG36128401B / VG36128801B / VG36128161B
CMOS Synchronous Dynamic RAM
8.2 Write with Auto Precharge
During a write cycle, the auto precharge starts at the timing that is equal to the value of tDPL(min.) after the last data
word input to the device.
WRITE with AUTO PRECHRGE
In summary, the auto precharge cycle begins relative to a reference clock that indicates the last data word is valid.
In the table below, minus means clocks before the reference; plus means clocks after the reference.
CAS latency
Read
Write
2
-1
+ tDPL(min.)
3
-2
+ tDPL(min.)
Burst lengh = 4
CLK
Command
CAS latency = 2
DQ
Command
CAS latency = 3
DQ
Remark WRITA means WRITE with AUTO Precharge
Hi - Z
DB0
DB3
DB2
DB1
WRITA B
T0
T1
T2
T3
T4
T5
T6
T7
Hi - Z_
T8
tDPL
DB0
DB3
DB2
DB1
AUTO PRECHARGE starts
相關(guān)PDF資料
PDF描述
VG36128161BT-7H 8M X 16 SYNCHRONOUS DRAM, 5.4 ns, PDSO54
VG36128161BFL-7L 8M X 16 SYNCHRONOUS DRAM, 5.4 ns, PBGA54
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
VG36128161BT 制造商:VML 制造商全稱:VML 功能描述:CMOS Synchronous Dynamic RAM
VG36128401A 制造商:VML 制造商全稱:VML 功能描述:CMOS Synchronous Dynamic RAM
VG36128401BT 制造商:VML 制造商全稱:VML 功能描述:CMOS Synchronous Dynamic RAM
VG36128801A 制造商:VML 制造商全稱:VML 功能描述:CMOS Synchronous Dynamic RAM
VG36128801BT 制造商:VML 制造商全稱:VML 功能描述:CMOS Synchronous Dynamic RAM