參數(shù)資料
型號: VDP3104B
廠商: MICRONAS SEMICONDUCTOR HOLDING AG
元件分類: 消費家電
英文描述: Video Processor Family
中文描述: SPECIALTY CONSUMER CIRCUIT, PDIP64
封裝: SHRINK, PLASTIC, DIP-64
文件頁數(shù): 32/72頁
文件大小: 603K
代理商: VDP3104B
VDP 31xxB
PRELIMINARY DATA SHEET
32
Micronas
Name
Default
Function
Mode
Number
of bits
I
2
C Sub
address
SYNC GENERATOR
h
21
16
w/r
LINE LENGTH:
bit[10:0]
LINE LENGTH register
LINE LENGTH has to be set to 1295 for
correct adjustment of vertical signals.
reserved (set to 0)
bit[15:11]
1295
LINLEN
h
29
16
w/r
AVO STOP:
bit[10:0]
bit[11]
bit[13:12]
reserved (set to 0)
disable/enable test pattern generator
luma output mode:
Y = rampe (240 ... 17)
Y = 16
Y = 90
Y = 240
reserved (set to 0)
chroma output: pseudo color bar/zero
0/1
00
01
10
11
0/1
0/1
bit[14]
bit[15]
0
0
0
0
0
AVSTOP
COLBAREN
LMODE
CMODE
h
22
16
w/r
NEWLINE:
bit[10:0]
NEWLINE register
This register defines the readout start of
the next line in respect to the value of the
sync counter. Value of this register must
be greater than 31 for correct operation.
reserved (set to 0)
bit [15:11]
50
NEWLIN
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