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參數(shù)資料
| 型號： | V55C1256164MGLI-75H |
| 廠商： | PROMOS TECHNOLOGIES INC |
| 元件分類： | DRAM |
| 英文描述： | SYNCHRONOUS DRAM, PDSO54 |
| 封裝： | 0.400 INCH, GREEN, PLASTIC, TSSOP2-54 |
| 文件頁數(shù)： | 8/48頁 |
| 文件大小： | 634K |
| 代理商： | V55C1256164MGLI-75H |
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16
V55C1256164MG Rev. 1.0 September 2008
ProMOS TECHNOLOGIES
V55C1256164MG
Notes for AC Parameters:
1.
For proper power-up see the operation section of this data sheet.
2.
AC timing tests are referenced to the 0.9V crossover point for VCCQ=1.8V components. The transition time is mea-
sured between VIH and VIL. All AC measurements assume tT = 1ns with the AC output load circuit shown in
Figure 1.
3.
If clock rising time is longer than 1 ns, a time (tT/2 – 0.5) ns has to be added to this parameter.
4.
If tT is longer than 1 ns, a time (tT – 1) ns has to be added to this parameter.
5. These parameter account for the number of clock cycle and depend on the operating frequency of the clock, as
follows: the number of clock cycle = specified value of timing period (counted in fractions as a whole number)
Self Refresh Exit is a synchronous operation and begins on the 2nd positive clock edge after CKE returns high.
Self Refresh Exit is not complete until a time period equal to tRC is satisfied once the Self Refresh Exit command is
registered.
6.
Referenced to the time which the output achieves the open circuit condition, not to output voltage levels
7. For TA= 0 to 70
° C (Commercial) / -40 to 85° C (Industrial).
8.
For TA= -40 to 105
° C (H grade) / -40 to 125° C (Extended).
Read Cycle
20
tOH
Data Out Hold Time
2.5
–
2.5
–
2.5
–
ns
2
21
tLZ
Data Out to Low Impedance Time
1
–
1
–
1
–
ns
22
tHZ
Data Out to High Impedance Time
CAS Latency = 3
CAS Latency = 2
CAS Latency = 1
–
_
6
9
20
–
_
7
9
22
–
_
8
10
24
ns
2, 3
23
tDQZ
DQM Data Out Disable Latency
–
2
–
2
–
2
CLK
Write Cycle
24
tWR
Write Recovery Time
15
–
15
–
15
–
ns
25
tDQW
DQM Write Mask Latency
0
–
0
–
0
–
CLK
#
Symbol Parameter
Limit Values
Unit
Note
-75
-9
-10
Min.
Max.
Min.
Max.
Min.
Max.
0.9V
CLK
COMMAND
OUTPUT
20 pF
I/O
Z=50 Ohm
+ 0.9 V
50 Ohm
tT
Figure 1.
t CK
VIH
VIL
t AC
t LZ
t HZ
t IH
t IS
t OH
AC Characteristics (Cont’d)
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|---|---|
| V55C2128164V | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:128Mbit LOW-POWER SDRAM 2.5 VOLT, TSOP II / BGA PACKAGE 8M X 16 |
| V55C2128164VB | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:128Mbit LOW-POWER SDRAM 2.5 VOLT, TSOP II / BGA PACKAGE 8M X 16 |
| V55C2128164VT | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:128Mbit LOW-POWER SDRAM 2.5 VOLT, TSOP II / BGA PACKAGE 8M X 16 |
| V55C2256164VB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:256Mbit MOBILE SDRAM 2.5 VOLT FBGA PACKAGE 16M X 16 |
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