- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄382724 > USS820D-DB USS-820D USB Device Controller PDF資料下載
參數(shù)資料
| 型號： | USS820D-DB |
| 英文描述： | USS-820D USB Device Controller |
| 中文描述： | 號- 820D USB設(shè)備控制器 |
| 文件頁數(shù)： | 45/58頁 |
| 文件大?。?/td> | 868K |
| 代理商： | USS820D-DB |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁當(dāng)前第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁
Agere Systems Inc.
45
Data Sheet, Rev. 4
June 2001
USB Device Controller
USS-820D
Suspend and Resume Behavior
(continued)
Firmware Suspend Initiate
(continued)
While the USS-820D is suspended, its internal regis-
ters may still be read, presumably only in self-powered
devices. The interface timing for such reads is different
from register reads during operational mode, and is
specified in the Register Timing Characteristics
section. Register writes must not be attempted while
the USS-820D is suspended, with the possible excep-
tion of the SCR.SRESET bit (see the SCR.SRESET
description for details). Certain register reads during
the nonsuspended state can cause USS-820D device
register states to change. These reads are described in
the Register Reads with Side Effects section. These
register reads must not be attempted while the USS-
820D is suspended.
Hardware Resume Detect/Initiate
Wake-up can be initiated by either the host or the appli-
cation. A host-signaled wake-up (global resume) is
indicated when the host drives a K state on the USB
bus. A remote wake-up is initiated by the application by
asserting the USS-820D RWUPN input pin. The USS-
820D can also be awakened by firmware writing a 1 to
SCR.SRESET if MCSR.FEAT = 1 (see SCR.SRESET
description for details). In these cases, the USS-820D
will initiate a wake-up sequence as described in the
next section.
Hardware Resume Sequence
The USS-820D starts a wake-up sequence by asyn-
chronously re-enabling its internal oscillator and PLL
and deasserting the SUSPN output pin. Once the inter-
nally generated clocks are stable (a period of 6 ms to
15 ms), then it enables clocks to the entire chip and
sets the SSR.RESUME register bit, which causes an
interrupt if SCRATCH.IE_RESUME register bit = 1. The
USS-820D will require up to 15 ms to resume function-
ality after a wake-up sequence is initiated. If the wake-
up was a remote wake-up, the USS-820D will then
drive wake-up signaling (K) on the USB for 12 ms.
The USS-820D requires a minimum of 7 ms from the
time a remote wake-up is initiated to the time it can
begin transmitting resume signaling upstream. This
guarantees adherence to the USB specification for
tWTRSM of 5 ms.
Firmware Resume Sequence
The USS-820D indicates that the resume sequence is
complete by setting the SSR.RESUME register bit, and
possibly causing an interrupt. When firmware is
prepared for the application to return to normal opera-
tion, it must reset the SSR.RESUME register bit to
allow detection of any subsequent suspend events.
Special Suspend Considerations for Bus-
Powered Devices
In order to meet the USB current requirements while
suspended, care must be exercised to guarantee that
all board signals connected to the USS-820D are at
their proper state. Voltages on USS-820D input pins
must be guaranteed to be outside the switching
threshold region (i.e., either a valid CMOS logic 1 or 0).
Pins that are connected to external, powered-off
components must not be driven high.
If an external oscillator is used as the clock source for
the USS-820D, it will most likely need to be turned off
by the USS-820D SUSPN output pin in order to meet
the USB suspend current requirement. When the oscil-
lator is turned back on after a resume (when the
SUSPN pin deasserts) and is stabilizing (a period that
must not exceed t
OSC
as specified in Table 46), its
output clock must not have a frequency greater than
12 MHz. As a result, during this stabilization period, the
oscillator output must not provide more than
84,000 clocks.
The following list describes the expected (or required,
as noted) values on the USS-820D pins for devices
which turn power off to external components during
suspend. Such devices must have SSR.SUSPPO = 1
to cause D[7:0], IRQN, and SOFN to be 3-stated during
suspend. They must also have MCSR.BDFEAT = 0
while suspended in order to guarantee that USBR and
DSA are 3-stated. These register settings avoid the
possibility of driving a logic 1 into a powered-off compo-
nent, which could result in excessive power consump-
tion and possible component damage.
External logic refers to components external to the
USS-820D.
Note:
Board signals which are connected to powered-
off components will most likely be naturally
pulled to logic 0 by the powered-off component.
I
A[4:0], IOCSN, RDN, WRN: Input-only pins. Their
value will be determined by external logic, and must
be a logic 0 or 1 to avoid current draw in the USS-
820D.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| UT12002 | 10/100 BASE T SINGLE PORT SURFACE MOUNT MAGNETICS |
| UT1701-7 | 500 Watt AC-DC Converters |
| UT1201-7 | 500 Watt AC-DC Converters |
| UT1240-7Z | 500 Watt AC-DC Converters |
| UT1702-7 | 500 Watt AC-DC Converters |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| USS820FD | 制造商:AGERE 制造商全稱:AGERE 功能描述:USB Device Controller |
| USS-820FD | 制造商:AGERE 制造商全稱:AGERE 功能描述:USB Device Controller |
| USS820TD-DB | 制造商:AGERE 制造商全稱:AGERE 功能描述:USS-820D USB Device Controller |
| USSFZ 038 | 功能描述:WASHER FLAT 3/8" RoHS:否 類別:硬件，緊固件，配件 >> 墊圈 系列:* 標(biāo)準(zhǔn)包裝:100 系列:- 類型:扁平 螺紋/螺釘/孔尺寸:#10 螺釘尺寸 直徑 - 內(nèi)部:0.196"（4.98mm） 直徑 - 外部:0.500"（12.70mm）1/2" 厚度:0.047"（1.19mm） 鍍層:- 材質(zhì):尼龍 其它名稱:3177K |
| USSFZ 044 | 功能描述:WASHER FLAT 7/16" ZINC RoHS:否 類別:硬件，緊固件，配件 >> 墊圈 系列:* 標(biāo)準(zhǔn)包裝:100 系列:- 類型:扁平 螺紋/螺釘/孔尺寸:#10 螺釘尺寸 直徑 - 內(nèi)部:0.196"（4.98mm） 直徑 - 外部:0.500"（12.70mm）1/2" 厚度:0.047"（1.19mm） 鍍層:- 材質(zhì):尼龍 其它名稱:3177K |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。