參數(shù)資料
型號: USB-I2C/LIN-CONV-Z
廠商: Analog Devices Inc
文件頁數(shù): 86/104頁
文件大?。?/td> 0K
描述: USB TO I2C/LIN CONV BOARD
標準包裝: 1
附件類型: 適配器板
適用于相關產(chǎn)品: ARM7TDMI?
ADuC7019/20/21/22/24/25/26/27/28/29
Data Sheet
Rev. F | Page 82 of 104
Table 153. PLAADC Register
Name
Address
Default Value
Access
PLAADC
0xFFFF0B48
0x00000000
R/W
PLAADC is the PLA source for the ADC start conversion signal.
Table 154. PLAADC MMR Bit Descriptions
Bit
Value
Description
31:5
Reserved.
4
ADC start conversion enable bit. Set by user
to enable ADC start conversion from PLA.
Cleared by user to disable ADC start
conversion from PLA.
3:0
ADC start conversion source.
0000
PLA Element 0.
0001
PLA Element 1.
1111
PLA Element 15.
Table 155. PLADIN Register
Name
Address
Default Value
Access
PLADIN
0xFFFF0B4C
0x00000000
R/W
PLADIN is a data input MMR for PLA.
Table 156. PLADIN MMR Bit Descriptions
Bit
Description
31:16
Reserved.
15:0
Input bit to Element 15 to Element 0.
Table 157. PLADOUT Register
Name
Address
Default Value
Access
PLADOUT
0xFFFF0B50
0x00000000
R
PLADOUT is a data output MMR for PLA. This register is
always updated.
Table 158. PLADOUT MMR Bit Descriptions
Bit
Description
31:16
Reserved.
15:0
Output bit from Element 15 to Element 0.
Table 159. PLALCK Register
Name
Address
Default Value
Access
PLALCK
0xFFFF0B54
0x00
W
PLALCK is a PLA lock option. Bit 0 is written only once. When
set, it does not allow modifying any of the PLA MMRs, except
PLADIN. A PLA tool is provided in the development system to
easily configure the PLA.
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