參數(shù)資料
型號(hào): UR5596
廠商: 友順科技股份有限公司
英文描述: MOS IC
中文描述: 馬鞍山集成電路
文件頁(yè)數(shù): 5/11頁(yè)
文件大?。?/td> 207K
代理商: UR5596
UR5596
MOS IC
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
QW-R502-045,A
5
CAPACIT OR S ELECT ION
A capacitor is recommended for improve performance during large load transients to prevent the input rail from
dropping, even though
UR5596
does not require for input stability. The input capacitor should be located as close as
possible to the PV
IN
pin. The typical recommended value for AL electrolytic capacitors is 50 μF and 10 μF with X5R
or better for Ceramic capacitors. If AV
IN
and PV
IN
are separated, the 47μF capacitor should be placed as close to
possible to the PV
IN
rail. An additional 0.1uF ceramic capacitor can be placed on the AVIN rail to prevent excessive
noise from coupling into the device.
UTC
UR5596
has been designed to be insensitive of output capacitor size or ESR (Equivalent Series Resistance).
The choice for output capacitor depends on the application and the requirements for load transient response of V
TT
.
As a general recommendation the output capacitor should be sized above 100 μF with a low ESR for SSTL
applications with DDR-SDRAM. The value of ESR should be determined by the maximum current spikes expected
and the extent at which the output voltage is allowed to droop.
T HERMAL DIS S IPAT ION
The UR5596 will generate heat result from internal power dissipation when current flow working. The device might
be damaged any beyond maximum junction temperature rating. The maximum allowable internal temperature rise
(T
Rmax
) can be calculated given the maximum ambient temperature (T
Amax
) of the application and the maximum
allowable junction temperature (T
Jmax
).
T
Rmax
= T
Jmax
T
Amax
From this equation, the maximum power dissipation (P
Dmax
) of the part can be calculated:
P
Dmax
= T
Rmax
/
θ
JA
The
θ
JA
of UR5596 can be calculated (refer to JEDEC standard) and will depend on several package type,
materials, ambient air temperature and so on.
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