參數(shù)資料
型號(hào): UPSD3334D-40U6T
廠商: 意法半導(dǎo)體
英文描述: Turbo Series Fast 8032 MCU with Programmable Logic
中文描述: Turbo系列8032微控制器的快速可編程邏輯
文件頁(yè)數(shù): 138/231頁(yè)
文件大?。?/td> 3722K
代理商: UPSD3334D-40U6T
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)當(dāng)前第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)第167頁(yè)第168頁(yè)第169頁(yè)第170頁(yè)第171頁(yè)第172頁(yè)第173頁(yè)第174頁(yè)第175頁(yè)第176頁(yè)第177頁(yè)第178頁(yè)第179頁(yè)第180頁(yè)第181頁(yè)第182頁(yè)第183頁(yè)第184頁(yè)第185頁(yè)第186頁(yè)第187頁(yè)第188頁(yè)第189頁(yè)第190頁(yè)第191頁(yè)第192頁(yè)第193頁(yè)第194頁(yè)第195頁(yè)第196頁(yè)第197頁(yè)第198頁(yè)第199頁(yè)第200頁(yè)第201頁(yè)第202頁(yè)第203頁(yè)第204頁(yè)第205頁(yè)第206頁(yè)第207頁(yè)第208頁(yè)第209頁(yè)第210頁(yè)第211頁(yè)第212頁(yè)第213頁(yè)第214頁(yè)第215頁(yè)第216頁(yè)第217頁(yè)第218頁(yè)第219頁(yè)第220頁(yè)第221頁(yè)第222頁(yè)第223頁(yè)第224頁(yè)第225頁(yè)第226頁(yè)第227頁(yè)第228頁(yè)第229頁(yè)第230頁(yè)第231頁(yè)
uPSD33xx
138/231
Security and NVM Sector Protection.
A
grammable security bit in the PSD Module pro-
tects its contents from unauthorized viewing and
copying. The security bit is specified in PSDsoft
Express and programmed into the uPSD33xx with
JTAG. Once set, the security bit will block access
of JTAG programming equipment to the PSD Mod-
ule Flash memory and PLD configuration, and also
blocks JTAG debugging access to the MCU Mod-
ule. The only way to defeat the security bit is to
erase the entire PSD Module using JTAG (the
erase command is the only JTAG command al-
lowed after the security bit has been set), after
which the device is blank and may be used again.
Additionally and independently, the contents of
each individual Flash memory sector can be write
protected (sector protection) by configuration with
PSDsoft Express. This is typically used to protect
8032 boot code from being corrupted by inadvert-
ent WRITEs to Flash memory from the 8032.
Status of sector protection bits may be read (but
not written) using two registers in csiop space.
Memory Mapping
There many different ways to place (or map) the
address range of PSD Module memory and I/O
depending on system requirements. The DPLD
provides complete mapping flexibility. Figure
53
shows one possible system memory map. In this
example, 128K bytes of Main Flash memory for a
uPSD3333 device is in 8032 program address
space, and 32K bytes of Secondary Flash memo-
ry, the SRAM, and csiop registers are all in 8032
XDATA space.
In Figure
53
, the nomenclature fs0..fs7 are desig-
nators for the individual sectors of Main Flash
memory, 16K bytes each. CSBOOT0..CSBOOT3
are designators for the individual Secondary Flash
memory segments, 8K bytes each. rs0is the des-
ignator for SRAM, and csiop designates the PSD
Module control register set.
The designer may easily specify memory mapping
in a point-and-click software environment using
PSDsoft Express, creating a non-volatile configu-
ration when the DPLD is programmed using
JTAG.
pro-
8032 Program Address Space.
In the example
of Figure
53
, six sectors of Main Flash memory
(fs2.. fs7) are paged across three memory pages
in the upper half of program address space, and
the remaining two sectors of Main Flash memory
(fs0, fs1) reside in the lower half of program ad-
dress space, and these two sectors are indepen-
dent of paging (they reside in “common” program
address space). This paged memory example is
quite common and supported by many 8051 soft-
ware compilers.
8032 Data Address Space (XDATA).
Four sec-
tors of Secondary Flash memory reside in the up-
per half of 8032 XDATA space in the example of
Figure
53
. SRAM and csiop registers are in the
lower half of XDATA space. The 8032 SFR regis-
ters and local SRAM inside the 8032 MCU Module
do not reside in XDATA space, so it is OK to place
PSD Module SRAM or csiop registers at an ad-
dress that overlaps the address of internal 8032
MCU Module SRAM and registers.
Figure 53. Typical System Memory Map
0000h
8000h
A000h
C000h
E000h
FFFFh
8032 XDATA
SPACE
(RD and WR)
Page X
8032 PROGRAM SPACE
(PSEN)
csboot0
8KB
csboot1
8KB
csboot2
8KB
csboot3
8KB
fs0
, 16KB
Common Memory to All Pages
fs7
16KB
fs5
16KB
fs3
16KB
rs0
, 8KB
Page 0
Page 2
Page 1
2000h
0000h
8000h
FFFFh
System
I/O
fs6
16KB
fs4
16KB
fs2
16KB
fs1
, 16KB
Common Memory to All Pages
C000h
4000h
csiop
256B
AI09173
相關(guān)PDF資料
PDF描述
UPSD3334DV-40T6T Turbo Series Fast 8032 MCU with Programmable Logic
UPSD3334DV-40U6T Turbo Series Fast 8032 MCU with Programmable Logic
UPSD3352D-40U6T Turbo Series Fast 8032 MCU with Programmable Logic
UPSD3352DV-40T6T Turbo Series Fast 8032 MCU with Programmable Logic
UPSD3352DV-40U6T Turbo Series Fast 8032 MCU with Programmable Logic
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
UPSD3334DV40U6 制造商:STMicroelectronics 功能描述:MCU 8-Bit uPSD 8032 CISC 256KB Flash 3.3V 80-Pin TQFP Tray
UPSD3334DV-40U6 功能描述:8位微控制器 -MCU 256K Flash 8K SRAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
UPSD3354D-40T6 功能描述:8位微控制器 -MCU 8032 MCU USB RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
UPSD3354D-40U6 功能描述:8位微控制器 -MCU 8BIT Fast 8032 MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
UPSD3354DV-40T6 功能描述:8位微控制器 -MCU 8032 MCU USB RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT