參數(shù)資料
型號: UPD78F9510GR-JJG-A
廠商: Renesas Electronics America
文件頁數(shù): 141/175頁
文件大?。?/td> 0K
描述: MCU 8BIT SGL CHIP 16PIN
標準包裝: 400
系列: 78K0S/Kx1+
核心處理器: 78K0S
芯體尺寸: 8-位
速度: 10MHz
外圍設(shè)備: LVD,POR,PWM,WDT
輸入/輸出數(shù): 13
程序存儲器容量: 1KB(1K x 8)
程序存儲器類型: 閃存
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 16-SSOP(0.173",4.40mm 寬)
包裝: 托盤
CHAPTER 4 PORT FUNCTIONS
User’s Manual U16994EJ6V0UD
66
Figure 4-6. Block Diagram of P34
RD
P34/RESET
Option
byte
Reset
Internal
bus
RD:
Read signal
Caution
Because the P34 pin functions alternately as the RESET pin, if it is used as an input port pin, the
function to input an external reset signal to the RESET pin cannot be used. The function of the
port is selected by the option byte. For details, refer to CHAPTER 15 OPTION BYTE.
Also, since the option byte is referenced after the reset release, if low level is input to the RESET
pin before the referencing, then the reset state is not released. When it is used as an input port
pin, connect the pull-up resistor.
4.2.3
Port 4
Port 4 is an 8-bit I/O port with an output latch. Each bit of this port can be set to the input or output mode by using
port mode register 4 (PM4). When the P40 to P47 pins are used as an input port, an on-chip pull-up resistor can be
connected in 1-bit units by using pull-up resistor option register 4 (PU4).
Reset signal generation sets port 4 to the input mode.
Figure 4-7 shows the block diagram of port 4.
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