參數(shù)資料
型號： UPD78F9210GR-JJG-A
廠商： Renesas Electronics America
文件頁數(shù)： 61/175頁
文件大小： 0K
描述： MCU 8BIT 1KB FLASH MEM 16-SSOP
標(biāo)準(zhǔn)包裝： 1
系列： 78K0S/Kx1+
核心處理器： 78K0S
芯體尺寸： 8-位
速度： 10MHz
外圍設(shè)備： LVD，POR，PWM，WDT
輸入/輸出數(shù)： 13
程序存儲器容量： 1KB（1K x 8）
程序存儲器類型： 閃存
RAM 容量： 128 x 8
電壓 - 電源 (Vcc/Vdd)： 2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 4x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 16-SSOP（0.173"，4.40mm 寬）
包裝： 托盤
其它名稱： 972-1045
UPD78F9210GR-JJG-A-ND
CHAPTER 8 WATCHDOG TIMER
User’s Manual U16994EJ6V0UD
151
8.4
Operation of Watchdog Timer
8.4.1
Watchdog timer operation when “l(fā)ow-speed internal oscillator cannot be stopped” is selected by
option byte
The operation clock of watchdog timer is fixed to low-speed internal oscillation clock.
After reset is released, operation is started at the maximum cycle (bits 2, 1, and 0 (WDCS2, WDCS1, WDCS0) of
the watchdog timer mode register (WDTM) = 1, 1, 1). The watchdog timer operation cannot be stopped.
The following shows the watchdog timer operation after reset release.
1.
The status after reset release is as follows.
Operation clock: Low-speed internal oscillation clock
Cycle: 218/fRL (546.13 ms: At operation with fRL = 480 kHz (MAX.))
Counting starts
2.
The following should be set in the watchdog timer mode register (WDTM) by an 8-bit memory manipulation
instruction
Notes 1, 2.
Cycle: Set using bits 2 to 0 (WDCS2 to WDCS0)
3.
After the above procedures are executed, writing ACH to WDTE clears the count to 0, enabling recounting.
Notes 1.
The operation clock (low-speed internal oscillation clock) cannot be changed. If any value is written to
bits 3 and 4 (WDCS3, WDCS4) of WDTM, it is ignored.
2.
As soon as WDTM is written, the counter of the watchdog timer is cleared.
Caution
In this mode, operation of the watchdog timer cannot be stopped even during STOP instruction
execution. For 8-bit timer H1 (TMH1), a division of the low-speed internal oscillation clock can be
selected as the count source, so clear the watchdog timer using the interrupt request of TMH1
before the watchdog timer overflows after STOP instruction execution. If this processing is not
performed, an internal reset signal is generated when the watchdog timer overflows after STOP
instruction execution.
A status transition diagram is shown below
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UPD78F9210MA-FAA-AX 制造商:Renesas Electronics Corporation 功能描述:78K0S/KY1+ MCU, 1KB FLASH, 0.125KB RAM, 16-SSOP - Trays 制造商:Renesas Electronics Corporation 功能描述:IC MCU 8BIT 1KB FLASH 16SSOP 制造商:Renesas Electronics Corporation 功能描述:MCU 8BIT 10MHZ 1KB 16SSOP
UPD78F9211CS-CAB-A 功能描述:MCU 8BIT 2KB FLASH 16PIN RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:78K0S/Kx1+ 標(biāo)準(zhǔn)包裝:300 系列:78K0R/Ix3 核心處理器:78K/0R 芯體尺寸:16-位 速度:40MHz 連通性:3 線 SIO，I²C，LIN，UART/USART 外圍設(shè)備:DMA，LVD，POR，PWM，WDT 輸入/輸出數(shù):27 程序存儲器容量:16KB（16K x 8） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:1K x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 8x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:38-SSOP 包裝:托盤
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