參數(shù)資料
型號(hào): UPD78F9210GR-JJG-A
廠商: Renesas Electronics America
文件頁數(shù): 43/175頁
文件大?。?/td> 0K
描述: MCU 8BIT 1KB FLASH MEM 16-SSOP
標(biāo)準(zhǔn)包裝: 1
系列: 78K0S/Kx1+
核心處理器: 78K0S
芯體尺寸: 8-位
速度: 10MHz
外圍設(shè)備: LVD,POR,PWM,WDT
輸入/輸出數(shù): 13
程序存儲(chǔ)器容量: 1KB(1K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 16-SSOP(0.173",4.40mm 寬)
包裝: 托盤
其它名稱: 972-1045
UPD78F9210GR-JJG-A-ND
CHAPTER 7 8-BIT TIMER H1
User’s Manual U16994EJ6V0UD
135
Figure 7-4. Format of 8-bit Timer H Mode Register 1 (TMHMD1)
TMHE1
Stop timer count operation (counter is cleared to 0)
Enable timer count operation (count operation started by inputting clock)
TMHE1
0
1
Timer operation enable
TMHMD1
Symbol
CKS12
CKS11
CKS10
TMMD11 TMMD10 TOLEV1
TOEN1
Address: FF70H
After reset: 00H
R/W
fXP
fXP/22
fXP/24
fXP/26
fXP/212
fRL/27
CKS12
0
1
CKS11
0
1
0
CKS10
0
1
0
1
0
1
(10 MHz)
(2.5 MHz)
(625 kHz)
(156.25 kHz)
(2.44 kHz)
(1.88 kHz (TYP.))
Count clock (fCNT) selection
Setting prohibited
Other than above
Interval timer mode
PWM output mode
Setting prohibited
TMMD11
0
1
TMMD10
0
Timer operation mode
Low level
High level
TOLEV1
0
1
Timer output level control (in default mode)
Disable output
Enable output
TOEN1
0
1
Timer output control
Other than above
<7>
6
5
4
3
2
<1>
<0>
Cautions 1. When TMHE1 = 1, setting the other bits of the TMHMD1 register is prohibited.
2. In the PWM output mode, be sure to set 8-bit timer H compare register 11 (CMP11) when
starting the timer count operation (TMHE1 = 1) after the timer count operation was stopped
(TMHE1 = 0) (be sure to set again even if setting the same value to the CMP11 register).
Remarks 1. fXP: Oscillation frequency of clock to peripheral hardware
2. fRL: Low-speed internal oscillation clock oscillation frequency
3. Figures in parentheses apply to operation at fXP = 10 MHz, fRL = 240 kHz (TYP.).
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