參數(shù)資料
型號： UPD78F9210GR-JJG-A
廠商： Renesas Electronics America
文件頁數(shù)： 133/175頁
文件大小： 0K
描述： MCU 8BIT 1KB FLASH MEM 16-SSOP
標(biāo)準(zhǔn)包裝： 1
系列： 78K0S/Kx1+
核心處理器： 78K0S
芯體尺寸： 8-位
速度： 10MHz
外圍設(shè)備： LVD，POR，PWM，WDT
輸入/輸出數(shù)： 13
程序存儲器容量： 1KB（1K x 8）
程序存儲器類型： 閃存
RAM 容量： 128 x 8
電壓 - 電源 (Vcc/Vdd)： 2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 4x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 16-SSOP（0.173"，4.40mm 寬）
包裝： 托盤
其它名稱： 972-1045
UPD78F9210GR-JJG-A-ND
CHAPTER 4 PORT FUNCTIONS
User’s Manual U16994EJ6V0UD
58
4.2
Port Configuration
Ports consist of the following hardware units.
Table 4-2. Configuration of Ports
Item
Configuration
Control registers
Port mode registers (PM2 to PM4)
Port registers (P2 to P4)
Port mode control register 2 (PMC2) (
μPD78F921x only)
Pull-up resistor option registers (PU2 to PU4)
Ports
Total: 14 (CMOS I/O: 13, CMOS input: 1)
Pull-up resistor
Total: 13
4.2.1
Port 2
Port 2 is a 4-bit I/O port with an output latch. Each bit of this port can be set to the input or output mode by using
port mode register 2 (PM2). When the P20 to P23 pins are used as an input port, an on-chip pull-up resistor can be
connected in 1-bit units by using pull-up resistor option register 2 (PU2).
This port can also be used for A/D converter analog input
Note, timer I/O, and external interrupt request input.
The P22 and P23 pins are also used as the X2 and X1 pins of the system clock oscillator. The functions of the P22
and P23 pins differ, therefore, depending on the selected system clock oscillator. The following three system clock
oscillators can be used.
(1) High-speed internal oscillator
The P22 and P23 pins can be used as I/O port pins or analog input pins to the A/D converter
Note.
(2) Crystal/ceramic oscillator
The P22 and P23 pins cannot be used as I/O port pins or analog input pins to the A/D converter
Note because they
are used as the X2 and X1 pins.
(3) External clock input
The P22 pin can be used as an I/O port pin or an analog input pin to the A/D converter
Note.
The P23 pin is used as the X1 pin to input an external clock, and therefore it cannot be used as an I/O port pin or
an analog input pin to the A/D converter
Note.
The system clock oscillation is selected by the option byte. For details, refer to CHAPTER 15 OPTION BYTE.
Reset signal generation sets port 2 to the input mode.
Figures 4-2 to 4-4 show the block diagrams of port 2.
Note
μPD78F921x only
<R>
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