
Data Sheet  U12304EJ2V0DS00
μ
PD784218, 784218Y
9
3.  MAJOR DIFFERENCES FROM 
μ
PD78078, 78078Y SUBSERIES
Series Name
μ
PD784218, 784218Y Subseries
μ
PD78078, 78078Y Subseries
Item
CPU
16-bit CPU
8-bit CPU
Minimum instruction
execution time
With main
system clock
160 ns (@ 12.5 MHz operation)
400 ns (@ 5.0 MHz operation)
With subsystem
clock
61 
μ
s (@ 32.768 kHz operation)
122 
μ
s (@ 32.768 kHz operation)
Memory space
1 MB
64 KB
I/O ports
Total
86
88
CMOS input
8
2
CMOS I/O
72
78
N-ch open-drain I/O
6
8
Pins with ancillary
functions
Note 1
Pins with pull-up
resistor
70
86
LED direct drive
outputs
22
16
Middle-voltage pins
6
8
Timer/counters
 16-bit timer/event counter 
×
 1 unit
 8-bit timer/event counter 
×
 6 units
 16-bit timer/event counter 
×
 1 unit
 8-bit timer/event counter 
×
 4 units
Serial interfaces
 UART/IOE (3-wire serial I/O)
×
 2 channels
 CSI (3-wire serial I/O, multi-master
supporting I
2
C bus
Note 2
)
×
 1 channel
 UART/IOE (3-wire serial I/O)
×
 1 channel
 CSI (3-wire serial I/O, 2-wire serial
I/O, I
2
C bus
Note 3
) 
×
 1 channel
 CSI (3-wire serial I/O, 3-wire serial
I/O with automatic transmit/receive
function) 
×
 1 channel
Interrupts
NMI pin
Provided
None
Macro service
Provided
None
Context switching
Provided
None
Programmable priority
4 levels
None
Standby function
HALT/STOP/IDLE modes
In low-power consumption mode:
HALT/IDLE modes
HALT/STOP modes
ROM correction
Provided
None
External access status function
Provided
None
Package
 100-pin plastic LQFP (fine pitch)
(14 
×
 14 mm)
 100-pin plastic QFP (14 
×
 20 mm)
 100-pin plastic LQFP (fine pitch)
(14 
×
 14 mm)
 100-pin plastic QFP (14 
×
 20 mm)
 100-pin ceramic WQFN
(14 
×
 20 mm) (
μ
PD78P078 and
78P078Y only)
Notes 1.
 The pins with ancillary functions are included in the I/O pins.
2.
 μ
PD784218Y Subseries only
3.
 μ
PD78078Y Subseries only