
Data Sheet  U12304EJ2V0DS00
μ
PD784218, 784218Y
17
6.2  Non-Port Pins (2/2)
Pin Name
I/O
Alternate Function
Function
NMI
Input
P02/INTP2
Non-maskable interrupt request input
INTP0
P00
External interrupt request input
INTP1
P01
INTP2
P02/NMI
INTP3
P03
INTP4
P04
INTP5
P05
INTP6
P06
PCL
Output
P23
Clock output (for trimming main system clock and subsystem clock)
BUZ
Output
P24
Buzzer output
RTP0 to RTP7
Output
P120 to P127
Real-time output port that outputs data in synchronization with
trigger
AD0 to AD7
I/O
P40 to P47
Lower address/data bus for expanding memory externally
A0 to A7
Output
P80 to P87
Lower address bus for expanding memory externally
A8 to A15
P50 to P57
Middle address bus for expanding memory externally
A16 to A19
P60 to P63
Higher address bus for expanding memory externally
RD
Output
P64
Strobe signal output for read operation of external memory
WR
P65
Strobe signal output for write operation of external memory
WAIT
Input
P66
To insert wait state(s) when external memory is accessed
ASTB
Output
P67
Strobe output to externally latch address information output to ports
4 through 6 and port 8 to access external memory
EXA
Output
P37
Status signal output during external memory access
RESET
Input
—
System reset input
X1
Input
—
Crystal connection for main system clock oscillation
X2
—
XT1
Input
—
Crystal connection for subsystem clock oscillation
XT2
—
ANI0 to ANI7
Input
P10 to P17
Analog voltage input for A/D converter
ANO0, ANO1
Output
P130, P131
Analog voltage output for D/A converter
AV
REF0
—
—
To apply reference voltage for A/D converter
AV
REF1
To apply reference voltage for D/A converter
AV
DD
Positive power supply for A/D converter.  Connect to V
DD
.
AV
SS
GND for A/D converter and D/A converter.  Connect to V
SS
.
V
DD
Positive power supply
V
SS
GND
TEST
Connect directly to V
SS
 or pull down (this pin is for the IC test).  For
the pull-down connection, use of a resistor whose resistance is
between 470 
 and 10 k
 is recommended.