參數(shù)資料
型號(hào)： UPD784218GC
廠商： NEC Corp.
英文描述： Connector assemblies, Network cables;
中文描述： 16-/8-bit的單晶片微控制器
文件頁(yè)數(shù)： 70/92頁(yè)
文件大小： 617K
代理商： UPD784218GC
μ
PD784218, 784218Y
Data Sheet U12304EJ2V0DS00
70
AC Characteristics
(2) External wait timing
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
Input time from address to
WAIT
↓
t
DAWT
V
DD
= 5.0 V
(2 + a) T – 40
ns
V
DD
= 3.0 V
(2 + a) T – 60
ns
Input time from ASTB
↓
to
WAIT
↓
t
DSTWT
V
DD
= 5.0 V
1.5T – 40
ns
V
DD
= 3.0 V
1.5T – 60
ns
Hold time from ASTB
↓
to
WAIT
t
HSTWT
V
DD
= 5.0 V
(0.5 + n) T + 5
ns
V
DD
= 3.0 V
(0.5 + n) T + 10
ns
Delay time from ASTB
↓
to
WAIT
↑
t
DSTWTH
V
DD
= 5.0 V
(1.5 + n) T – 40
ns
V
DD
= 3.0 V
(1.5 + n) T – 60
ns
Input time from RD
↓
to WAIT
↓
t
DRWTL
V
DD
= 5.0 V
T – 40
ns
V
DD
= 3.0 V
T – 60
ns
Hold time from RD
↓
to WAIT
↓
t
HRWT
V
DD
= 5.0 V
nT + 5
ns
V
DD
= 3.0 V
nT + 10
ns
Delay time from RD
↓
to WAIT
↑
t
DRWTH
V
DD
= 5.0 V
(1 + n) T – 40
ns
V
DD
= 3.0 V
(1 + n) T – 60
ns
Input time from WAIT
↑
to data
t
DWTID
V
DD
= 5.0 V
0.5T – 5
ns
V
DD
= 3.0 V
0.5T – 10
ns
Delay time from WAIT
↑
to RD
↑
t
DWTR
V
DD
= 5.0 V
0.5T
ns
V
DD
= 3.0 V
0.5T
ns
Delay time from WAIT
↑
to WR
↑
t
DWTW
V
DD
= 5.0 V
0.5T
ns
V
DD
= 3.0 V
0.5T
ns
Input time from WR
↓
to WAIT
↓
t
DWWTL
V
DD
= 5.0 V
T – 40
ns
V
DD
= 3.0 V
T – 60
ns
Hold time from WR
↓
to WAIT
t
HWWT
V
DD
= 5.0 V
nT + 5
ns
V
DD
= 3.0 V
nT + 10
ns
Delay time from WR
↓
to WAIT
↑
t
DWWTH
V
DD
= 5.0 V
(1 + n) T – 40
ns
V
DD
= 3.0 V
(1 + n) T – 60
ns
Remark
T: t
CYK
= 1/f
XX
(f
XX
: main system clock frequency)
a: 1 (during address wait), otherwise 0
n: Number of waits (n
≥
0)
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UPD784218GF 16-/8-BIT SINGLE-CHIP MICROCONTROLLERS
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