參數(shù)資料
型號: UPD72042AGT
廠商: NEC Corp.
英文描述: LSI DEVICES FOR Inter Equipment BusTM (IEBusTM) PROTOCOL CONTROL
中文描述: LSI器件間設(shè)備BusTM(IEBusTM)協(xié)議控制
文件頁數(shù): 72/92頁
文件大?。?/td> 541K
代理商: UPD72042AGT
μ
PD72042A, 72042B
72
DATA SHEET S13990EJ2V0DS00
6.3 INTERRUPT ROUTINE
The interrupt routine performs the required processing when an interrupt request is issued from the
μ
PD72042A
or
μ
PD72042B.
The interrupt routine disables the interrupts received from the
μ
PD72042A or
μ
PD72042B, reads the statuses (FLG
and RCR registers) of the
μ
PD72042A or
μ
PD72042B, and sets the communication flags to be used by the main
routine.
To enable the handling of an interrupt request which may occur while the interrupts from the
μ
PD72042A or
μ
PD72042B are disabled, do not clear the interrupt flags such that such a request can be detected upon the completion
of the interrupt routine processing (see
Fig. 6-2
).
Fig. 6-2 Operation when an Interrupt Occurs during Execution of Interrupt Routine
IRQ
RCR
Microcompute
routine
Main routine
(interrupts enabled)
Interrupt routine
(interrupts disabled)
Interrupt routine
(interrupts disabled)
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