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參數(shù)資料
| 型號： | UPD4664312F9-B65X-CR2 |
| 廠商： | NEC Corp. |
| 英文描述： | 64M-BIT CMOS MOBILE SPECIFIED RAM 4M-WORD BY 16-BIT EXTENDED TEMPERATURE OPERATION |
| 中文描述： | 6400位CMOS移動指明內(nèi)存分詞由16位溫度范圍 |
| 文件頁數(shù)： | 9/36頁 |
| 文件大?。?/td> | 299K |
| 代理商： | UPD4664312F9-B65X-CR2 |
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Preliminary Data Sheet M15867EJ5V0DS
9
μ
PD4664312-X
2. Partial Refresh
2.1 Standby Mode
In addition to the regular standby mode (Standby Mode 1) with a 64M bits density, Standby Mode 2, which performs
partial refresh, is also provided.
2.2 Density Switching
In Standby Mode 2, the densities that can be selected for performing refresh are 16M bits, 8M bits, 4M bits, and 0M bit.
The density for performing refresh can be set with the mode register. Once the refresh density has been set in the
mode register, these settings are retained until they are set again, while applying the power supply. However, the mode
register setting will become undefined if the power is turned off, so set the mode register again after power application.
(For how to perform mode register settings, refer to section
4. Mode Register Settings
.)
2.3 Standby Mode Status Transition
In Standby Mode 1, MODE and /CS are high level, or MODE, /LB and /UB are high level. In Standby Mode 2, MODE is
low level. In Standby Mode 2, if 0M bit is set as the density, it is necessary to perform initialization the same way as after
applying power, in order to return to normal operation from Standby Mode 2. When the density has been set to 16M bits,
8M bits, or 4M bits in Standby Mode 2, it is not necessary to perform initialization to return to normal operation from
Standby Mode 2.
For the timing charts, refer to
Figure 6-14. Standby Mode 2 (data hold: 16M bits / 8M bits / 4M bits) Entry / Exit
Timing Chart
,
Figure 6-15. Standby Mode 2 (data not held) Entry / Exit Timing Chart
.
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