![](http://datasheet.mmic.net.cn/320000/UPD30102_datasheet_16362875/UPD30102_689.png)
APPENDIX A DIFFERENCES BETWEEN V
R
4102 AND V
R
4101
689
A.2.8 GIU
(1) GPIO Pins
The V
R
4102 has 49 general-purpose I/O pins and 33 of them have alternate functions, while the V
R
4101 has 12
general I/O pins and none of them have alternate functions.
GPIO[15] pin of the V
R
4102 is assigned as DCD# input which has dedicated pin in the V
R
4101. In both the
V
R
4102 and the V
R
4101, GIU controls DCD# input as well as GPIO pins.
GPIO pins are also used as interrupt request inputs except for GPIO[49..32] of the V
R
4102, and in which power
modes an interrupt request is enabled is different from each GPIO pin.
The functions of GPIO pins are as summarized below.
Enabled power mode
V
R
4102
Pins
I/O
Interrupt input
V
R
4101
Alternative
functions in
V
R
4102
Notes
GPIO[49]
GPIO[48]
GPIO[47..44]
GPIO[43..32]
GPIO[31..16]
GPIO[15]
GPIO[14]
GPIO[13]
GPIO[12]
GPIO[11]
GPIO[10..9]
GPIO[8..4]
GPIO[3..0]
O
I/O
I/O
O
I/O
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
N/A
N/A
N/A
N/A
A
A
A
A
A
A
A
A
A
Standby
Standby
Standby
Standby
Standby
Hibernate
Suspend
Suspend
Suspend
Suspend
Suspend
Standby
Hibernate
-
-
-
-
-
-
-
-
DBUS32
DSIU pins
KSCAN[11..0]
DATA[31..16]
DCD#
1
-
-
-
-
-
-
-
Hibernate
2
-
Standby
Suspend
Standby
Standby
Notes 1.
This pin is assigned as DCD# input in the V
R
4102.
2.
This pin does not exist in the V
R
4101. DCD input is internally connected to the corresponding
register bits for GPIO[13] in GIU and the V
R
4101 manipulates those bits as input only.
(2) Interrupt Input Control
In both the V
R
4102 and the V
R
4101, either edge, high level, or low level of the input signal is selectable as an
interrupt input trigger.
In the V
R
4102, whether interrupt requests are held in GIU or not is selectable, while they are not held in the
V
R
4101.