
CHAPTER 1 INTRODUCTION
46
1.5.3 CPU Instruction Set Overview
Each CPU instruction is 32 bits long. As shown in Figure 1-4, there are three instruction formats:
—
immediate (I-type)
—
jump (J-type)
—
register (R-type)
Figure 1-4. CPU Instruction Formats
I-type (immediate)
op
0
15
16
20
21
25
26
31
J-type (jump)
op
target
0
25
26
31
R-type (register)
op
0
15
16
20
21
25
26
31
5
6
10
11
rs
rt
immediate
rs
rt
rd
sa
funct
The instruction set can be further divided into the following five groupings:
(1) Load and store instructions move data between memory and general-purpose registers. They are all
immediate (I-type) instructions, since the only addressing mode supported is base register plus 16-bit,
signed immediate offset.
(2) Computational instructions perform arithmetic, logical, shift, multiply, and divide operations on values in
registers. They include R-type (in which both the operands and the result are stored in registers) and I-type
(in which one operand is a 16-bit signed immediate value) formats.
(3) Jump and branch instructions change the control flow of a program. Jumps are always made to an absolute
address formed by combining a 26-bit target address with the high-order bits of the Program Counter (J-type
format) or register address (R-type format). The format of the branch instructions is I type. Branches have
16-bit offsets relative to the Program Counter. JAL instructions save their return address in register 31.
(4) Coprocessor 0 (System Control Coprocessor, CP0) instructions perform operations on CP0 registers to
control the memory-management and exception-handling facilities of the processor.
(5) Special instructions perform system calls and breakpoint operations, or cause a branch to the general
exception-handling vector based upon the result of a comparison. These instructions occur in both R-type
(both the operands and the result are stored in registers) and I-type (one operand is a 16-bit signed
immediate value) formats.
Chapter 3 provides a more detailed summary (Refer to Chapter 27 for detailed descriptions of the operation of
each instruction) .