參數(shù)資料
型號(hào)： UDA1352HL
廠商： NXP SEMICONDUCTORS
元件分類： 消費(fèi)家電
英文描述： 48 kHz IEC 60958 audio DAC
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP48
封裝： 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-313-2, LQFP-48
文件頁(yè)數(shù)： 39/64頁(yè)
文件大?。?/td> 262K
代理商： UDA1352HL
2003 Mar 25
39
Philips Semiconductors
Preliminary specification
48 kHz IEC 60958 audio DAC
UDA1352HL
12.7
De-emphasis and mute (write)
Table 40
Register address 13H
Table 41
Description of register bits
Table 42
De-emphasis select
BIT
15
14
13
12
11
10
9
8
Symbol
Default
QMUTE
0
MT
1
GS
0
DE_2
0
DE_1
0
DE_0
0
BIT
7
6
5
4
3
2
1
0
Symbol
Default
BIT
SYMBOL
DESCRIPTION
15
QMUTE
Quick mute function.
A 1-bit value to set the quick mute mode. When set to logic 0, the
soft mute mode is selected. When set to logic 1, the quick mute mode is selected.
Default value 0.
Mute.
A 1-bit value to set the mute function. When set to logic 0, the audio output is not
muted (unless pin MUTE is logic 1). When set to logic 1, the audio output is muted.
Default value 1.
Gain select.
A 1-bit value to set the gain of the interpolator path. When set to logic 0, the
gain is 0 dB. When set to logic 1, the gain is 6 dB. Default value 0.
reserved
De-emphasis select.
A 3-bit value to enable digital de-emphasis. This setting is only
effective in operating modes 4 to 8. In modes 1 and 3, de-emphasis is applied
automatically. Default value 000; see Table 42.
reserved
14
MT
13
GS
12 to 11
10 to 8
DE_[2:0]
7 to 0
DE_2
DE_1
DE_0
FUNCTION
0
0
0
0
0
0
1
1
0
1
0
1
no de-emphasis (default)
32 kHz
44.1 kHz
48 kHz
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