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參數資料
| 型號： | TVP3025-175 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Video Interface PALETTE(三PLL，視頻接口調色器) |
| 中文描述： | 視頻接口盒（三鎖相環(huán)，視頻接口調色器） |
| 文件頁數： | 72/99頁 |
| 文件大?。?/td> | 663K |
| 代理商： | TVP3025-175 |
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2–58
2.4.15.3 Command Register 2 (RS value = 11001)
Writing to command register 2 sets input-clock-selection register (see Table 2–5) bits 1 and 2 to logic 0. Also,
cursor-control register (see Section 2.3.18.3) bits 2 and 5 are set to logic 0.
Table 2–25. Command Register 2 (RS value = 11001)
BIT
NAME
VALUES
DESCRIPTION
CR27
0:
SCLK disable Not supported in the BT485 mode of the TVP3025
SCLK disable. Not supported in the BT485 mode of the TVP3025.
1:
CR26
Reserved (logic 0)
CR25
0: VGA mode (default)
VGA mode select. Unlike the BT485, this bit solely controls the switching
between modes. PSEL is disregarded.
1: NonVGA mode
CR24
0: CLK0 selected (default)
Pixel clock input select
1: CLK1 selected
CR23
0:
Noninterlaced/interlaced display selection. Interlaced mode is not supported
on the TVP3025. This bit is don’t care.
1:
CR22
0:
Sparse and contiguous indexing select for 16 bpp mode. Not supported on the
TVP3025. This bit is don’t care.
1:
CR21
0: Cursor disable (default)
64 x 64 x 2 cursor enable. A three color cursor is not supported on the
TVP3025.
1: Cursor enable (high)
CR20
0: XGA cursor (default)
1: X-windows cursor (high)
NOTE: The following command register 2 bits are written into the following TVP3025 indirect register bits: CR20 into
cursor-control register bit 4, CR21 into cursor-control register bit 6, CR24 into input-clock-selection register
bit 0, CR25 into multiplexer-control register 2 bit 7, CR25 into miscellaneous-control register bit 4, and CR26 into
input-clock-selection register bit 3.
Cursor mode select.
2.4.15.4 Command Register 3 (RS value = 11010, when CR07 = logic 1)
Table 2–26. Command Register 3 (RS value = 11010)
BIT
NAME
VALUES
DESCRIPTION
CR37
Reserved (logic 0)
CR36
Reserved (logic 0)
CR35
Reserved (logic 0)
CR34
Reserved (logic 0)
CR33
0: Clock doubler disable
(default)
This bit enables or disables the internal 2x clock doubler circuit.
1: Clock doubler enable
CR32
0:
Cursor select. Not supported by the TVP3025, since only 64 x 64 cursor is
allowed.
1:
CR31,
30
CR31 = A9
CR30 = A8
MSBs for 10-bit address counter for cursor RAM addressing. See Section
MSBs for 10 bit address counter for cursor RAM addressing. See Section
2.4.3.
NOTE: CR33 is written into input-clock-selection register bit 4 in the BT485 mode of operation.
These registers are not initialized at power up. All command registers are set to a logic 0 when a low signal is
asserted at the RESET terminal.
相關PDF資料 |
PDF描述 |
|---|---|
| TVP3030-175 | Video Interface PALETTE Exract(1600×1200，24位真彩色視頻接口調色器) |
| TVP3030-220 | Video Interface PALETTE Exract(1600×1200，24位真彩色視頻接口調色器) |
| TVP3030-250 | Video Interface PALETTE Exract(1600×1200，24位真彩色視頻接口調色器) |
| TVP3409-170 | Advanced Video Interface PALETTE(雙PLL，視頻接口調色器真彩色CMOS) |
| TVP3409-135 | Advanced Video Interface PALETTE(雙PLL，視頻接口調色器真彩色CMOS) |
相關代理商/技術參數 |
參數描述 |
|---|---|
| TVP3025-175PCE | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette |
| TVP3025-220MDN | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette |
| TVP3025-220PCE | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video DAC with Color Palette (RAMDAC) |
| TVP3026 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette |
| TVP3026-135AMDN | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette |
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