- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385951 > TVP3025-175 (Texas Instruments, Inc.) Video Interface PALETTE(三PLL，視頻接口調(diào)色器) PDF資料下載
參數(shù)資料
| 型號： | TVP3025-175 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Video Interface PALETTE(三PLL，視頻接口調(diào)色器) |
| 中文描述： | 視頻接口盒（三鎖相環(huán)，視頻接口調(diào)色器） |
| 文件頁數(shù)： | 70/99頁 |
| 文件大?。?/td> | 663K |
| 代理商： | TVP3025-175 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁當前第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁
2–56
2.4.13
The video control signals SYSBL, SYSVS, and SYSHS are latched on the rising edge of LCLK to maintain
synchronization with the color data. In the VGA modes, VGAHS, VGAVS, and VGABL are latched on the
rising edge of CLK0. These signals add appropriate weighted current sources to the IOG analog output as
shown in Figures 2–15, 2–16, 2–17, producing the specific output levels required for video applications. The
CR05 command bit is used to specify whether a 0 or 7.5 IRE blanking pedestal is to be used. Command
register bit CR03 specifies whether the IOG (green) output channel contains sync information.
Video Generation
2.4.14
SENSE is a logic 0 if one or more of the IOR, IOG, IOB outputs have exceeded the internal voltage reference
level of the SENSE comparator circuit. This output is used to determine the presence of the CRT monitor,
and the diagnostic code, the difference between a loaded or an unloaded RGB line can be discerned. The
SENSE voltage reference is specified in Section 3.4 under operating characteristics. It is derived from a
1.235-V reference on the REF terminal. If the internal voltage reference is used, then slightly higher
tolerances can be assumed. In general, the DAC low voltage should be set to less than 260 mV, and the
DAC high voltage to greater than 410 mV.
SENSE Output
2.4.15
2.4.15.1 Command Register 0 (RS value = 10110)
Table 2–23. Command Register 0 (RS value = 10110)
Control Register Bit Definitions
BIT
NAME
VALUES
DESCRIPTION
CR07
0: Disable (default)
Command register 3 and 4 enable. If this bit is set to logic 1, then command
registers 3 and 4 can be accessed indirectly.
1: Enable
CR06
0: Normal operation
(default)
Clock disable ANDed with CR00. If this bit is set to a logic 1 while CR00 is a
logic 1, then the internal dot clock is disabled to conserve system power.
1: Disable internal dot
clock
CR05
0: 0 IRE (default)
Pedestal control. This bit specifies whether a 0 or 7.5 IRE blanking pedestal
is to be generated on the video outputs.
1: 7.5 IRE
CR04
0: Disable (default)
Sync on blue – not supported on TVP3025
1: Enable
CR03
0: Disable (default)
Sync enable. This bit specifies whether sync information is to be output onto
IOG.
1: Enable
CR02
0: Disable (default)
Sync on red – not supported on TVP3025
1: Enable
CR01
0: 6-bit operation (default)
This bit specifies if the MPU is reading and writing 8 bits (logical 1) or 6 bits
(logical 0) of color information
1: 8-bit operation (high)
CR00
0: Normal operation
(default)
DAC power down bit. If this bit is a logic 1, the DACs are internally powered
down for sleep mode operation
1: Power down enable
NOTE: At device reset into BT485 mode or when this register is written in BT485 mode, TVP3025 miscellaneous-control
register bit 2 is set to logic 1.
The following command register 0 bits are written into the following TVP3025 indirect register bits: CR00 into
miscellaneous-control register bit 0, CR01 into miscellaneous-control register bit 3, CR03 into general-control
register bit 5, CR05 into general-control register bit 4, and CR06 into miscellaneous-control register bit 1.
This register is not initialized at power up. All command registers are set to logic 0 when a low signal is asserted
at the RESET terminal.
相關PDF資料 |
PDF描述 |
|---|---|
| TVP3030-175 | Video Interface PALETTE Exract(1600×1200，24位真彩色視頻接口調(diào)色器) |
| TVP3030-220 | Video Interface PALETTE Exract(1600×1200，24位真彩色視頻接口調(diào)色器) |
| TVP3030-250 | Video Interface PALETTE Exract(1600×1200，24位真彩色視頻接口調(diào)色器) |
| TVP3409-170 | Advanced Video Interface PALETTE(雙PLL，視頻接口調(diào)色器真彩色CMOS) |
| TVP3409-135 | Advanced Video Interface PALETTE(雙PLL，視頻接口調(diào)色器真彩色CMOS) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TVP3025-175PCE | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette |
| TVP3025-220MDN | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette |
| TVP3025-220PCE | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video DAC with Color Palette (RAMDAC) |
| TVP3026 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette |
| TVP3026-135AMDN | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette |
發(fā)布緊急采購，3分鐘左右您將得到回復。